Re: [PATCH v3] gpio: mt7621: fix interrupt banks mapping on gpio chips

[Bartosz Golaszewski]

On Tue, 09 Jun 2026 05:11:18 +0200, Sergio Paracuellos wrote:
> The GPIO controller's registers are organized as sets of eight 32-bit
> registers with each set controlling a bank of up to 32 pins. A single
> interrupt is shared for all of the banks handled by the controller.
> The driver implements this using three gpio chip instances every one
> with its own irq chip. Every single pin can generate interrupts having
> a total of 96 possible interrupts here. It looks like there is a problem
> with interrupts being properly mapped to the gpio bank using this solution.
> This problem report is in the following lore's link [0].
> 
> [...]

Applied, thanks!

[1/1] gpio: mt7621: fix interrupt banks mapping on gpio chips
      https://git.kernel.org/brgl/c/a46f2e5720f5670feda145709d1f0d20be5c7263

Best regards,
-- 
Bartosz Golaszewski <bartosz.golaszewski@xxxxxxxxxxxxxxxx>