Re: [PATCH v2] arm64: dts: qcom: ipq5018: Correct CMN PLL reference clock rate

[Konrad Dybcio]

On 5/21/26 9:55 AM, George Moussalem via B4 Relay wrote:
> From: George Moussalem <george.moussalem@xxxxxxxxxxx>
> 
> The correct CMN PLL reference clock rate for IPQ5018 is 4.8 GHz.
> 
> The CMN PLL driver did not account for the ref clock divider which is 2
> for IPQ5018. Therefore, the computed rate was twice the actual output.
> 
> With the driver now accounting for the CMN PLL reference clock
> divider (commit: 88c543fff756), set the correct reference clock rate.
> 
> Fixes: c006b249c544 ("arm64: dts: ipq5018: Add CMN PLL node")
> Signed-off-by: George Moussalem <george.moussalem@xxxxxxxxxxx>
> ---
> Changes in v2:
> - Removed line break in commit message between Fixes and SOB tags
> - Link to v1: https://patch.msgid.link/20260519-ipq5018-cmn-pll-rate-fix-v1-1-3c83a173c27f@xxxxxxxxxxx
> ---

I have no reference for this, but I trust you.. maybe +Kathiravan
could double-check

Acked-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxxxxxxxx>

Konrad