Re: [PATCH 1/2] bindings: power: supply: qcom,pmic-glink: Document thermal-mitigation

[Krzysztof Kozlowski]

On Tue, Jun 09, 2026 at 02:46:42PM +0530, DhruvinRajpura wrote:
> From: Dhruvin Rajpura <drajpura@xxxxxxxxxxxxxxxx>
> 
> The qcom,thermal-mitigation property allows platforms to define
> discrete fast charge current limits used by the thermal framework
> to throttle battery charging in response to thermal events.
> 
> Document the qcom,thermal-mitigation property to describe the array
> of fast charge current limits in microamps that map to thermal
> cooling states.
> 
> Signed-off-by: Dhruvin Rajpura <drajpura@xxxxxxxxxxxxxxxx>
> ---
>  .../devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml          | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml
> index ff01d2f3ee5b..fcb69ebaa7cb 100644
> --- a/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml
> +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml
> @@ -58,6 +58,16 @@ properties:
>        The array should contain a gpio entry for each PMIC Glink connector, in reg order.
>        It is defined that GPIO active level means "CC2" or Reversed/Flipped orientation.
>  
> +  qcom,thermal-mitigation:

Use proper suffixes, see writing bindings.

Also, name looks too much as policy. Describe the hardware.

> +    $ref: /schemas/types.yaml#/definitions/uint32-array
> +    description:
> +      Array of fast charge current limit values for different system thermal
> +      mitigation levels. This should be a flat array that denotes the maximum
> +      charging current (in uA) for each thermal level. Elements should be listed
> +      in monotonically decreasing (non-increasing) order.

What is a thermal level? How do you define it? How does it map to
thermal bindings?


Best regards,
Krzysztof