Re: [PATCH 01/16] riscv: Introduce instruction table generation

From: Nam Cao

Date: Thu Jun 11 2026 - 01:22:04 EST


Charlie Jenkins <thecharlesjenkins@xxxxxxxxx> writes:
> This is a weird one. The Ziclsd extension introduces it for RV32[1]. All
> of the data is generated from the riscv-unified-db and because it is in
> the Ziclsd extension, c.ld is included for 32-bit in the c.ld
> description [2].

Oh :( We probably should amend the base spec to mention that.

>> > + compressed_name=${name##c.*}
>> ^^^^^^^^^^^^^^^
>> this name is misleading
>
> That's fair, I can rename it to be something like "compressed_inst"?

My issue is that "compressed_name" indicates that it holds the
compressed variant of the name. But it actually is empty if the
instruction is compressed, otherwise it is the original instruction name.

I am not sure what is a better name. Perhaps just inline this to the
usage below.

Nam