Re: [PATCH] cacheinfo: don't propagate DT/ACPI error when arch supplies info (arm64)

From: Breno Leitao

Date: Thu Jun 11 2026 - 07:06:50 EST


Hello Pierre,

On Thu, Jun 11, 2026 at 12:30:24PM +0200, Pierre Gondois wrote:
> On 6/9/26 18:23, Breno Leitao wrote:
> > cache_setup_properties() sets use_arch_info = true when DT/ACPI
> > provide no cache nodes and the arch can derive the topology from
> > CPU registers (e.g. arm64 reading CLIDR_EL1), but still returns the
> > original -ENOENT. cache_shared_cpu_map_setup() bails on that error
> > before the new flag can take effect, so the first CPU brought online
> > always trips a misleading warning:
> >
> > cacheinfo: Unable to detect cache hierarchy for CPU 0
> >
> > Subsequent CPUs skip cache_setup_properties() entirely because
> > use_arch_info is now true, which is why only CPU0 hits it. This is
> > reproducible on arm64 with the QEMU 'virt' machine, whose default DT
> > has no cache nodes.
> >
> > Clear ret after setting use_arch_info so the caller proceeds and
> > populates the shared cpu map via the arch-supplied leaves.
> >
> > Fixes: ef9f643a9f8b ("cacheinfo: Add use_arch[|_cache]_info field/function")
> > Signed-off-by: Breno Leitao <leitao@xxxxxxxxxx>
> > ---
> > Cc; hruben@xxxxxxxx
> > ---
> > drivers/base/cacheinfo.c | 13 +++++++++++--
> > 1 file changed, 11 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c
> > index 70701d3bc81c..4e11d36f127e 100644
> > --- a/drivers/base/cacheinfo.c
> > +++ b/drivers/base/cacheinfo.c
> > @@ -401,9 +401,18 @@ static int cache_setup_properties(unsigned int cpu)
> > else if (!acpi_disabled)
> > ret = cache_setup_acpi(cpu);
> > - // Assume there is no cache information available in DT/ACPI from now.
> > - if (ret && use_arch_cache_info())
> > + /*
> > + * If DT/ACPI lacks cache nodes but the arch can derive the topology
> > + * from CPU registers (e.g. arm64 reading CLIDR_EL1), fall back to
> > + * that path instead of propagating the error. Otherwise the very
> > + * first CPU processed trips a misleading "Unable to detect cache
> > + * hierarchy" warning, because use_arch_info is only set after the
> > + * first failure.
> > + */
>
> NIT: Maybe the comment is a bit long/verbose,
> but maybe also not worth a v2
>
> Reviewed-by: Pierre Gondois <pierre.gondois@xxxxxxx>

Thanks for the review, let me shirnk the comment above and send a v2. It
will be painless.

--breno