[PATCH v4 08/16] dt-bindings: riscv: Add Zic64b extension description

From: Guodong Xu

Date: Thu Jun 11 2026 - 16:17:27 EST


Zic64b mandates that cache blocks are 64 bytes in size and naturally
aligned in the address space. It is a mandatory extension of both the
RVA22 (U64/S64) and RVA23 (U64/S64) profiles, ratified with RISC-V
Profiles Version 1.0.

Document it so it can be described in the riscv,isa-extensions property,
alongside the related Zicbom/Zicbop/Zicboz cache-block extensions. Since
Zic64b fixes the cache block size at 64 bytes, also add a schema check
requiring any present cbom/cbop/cboz block size to be 64.

Signed-off-by: Guodong Xu <docular.xu@xxxxxxxxx>
---
v4: Insert zic64b at its sorted position (before zicbom).
Update the commit message.
v3: New patch.
---
.../devicetree/bindings/riscv/extensions.yaml | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)

diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml
index 5ffc40d599c02..1c24999beb59e 100644
--- a/Documentation/devicetree/bindings/riscv/extensions.yaml
+++ b/Documentation/devicetree/bindings/riscv/extensions.yaml
@@ -494,6 +494,12 @@ properties:
in commit 64074bc ("Update version numbers for Zfh/Zfinx") of
riscv-isa-manual.

+ - const: zic64b
+ description:
+ The standard Zic64b extension for 64-byte naturally aligned cache
+ blocks, as ratified in RISC-V Profiles Version 1.0, with commit
+ b1d806605f87 ("Updated to ratified state.")
+
- const: zicbom
description:
The standard Zicbom extension for base cache management operations as
@@ -1142,6 +1148,20 @@ allOf:
not:
contains:
const: zilsd
+ # Zic64b mandates 64-byte naturally aligned cache blocks
+ - if:
+ properties:
+ riscv,isa-extensions:
+ contains:
+ const: zic64b
+ then:
+ properties:
+ riscv,cbom-block-size:
+ const: 64
+ riscv,cbop-block-size:
+ const: 64
+ riscv,cboz-block-size:
+ const: 64

additionalProperties: true
...

--
2.43.0