Re: [PATCH v2 0/3] Fix three racy updates to MSR_K7_HWCR

[Andrew Cooper]

> hoists the HWCR update logic out
> into a new helper, amd_update_hwcr(), which performs the read-modify-write
> with interrupts disabled

Add some `perf` to your test scenario and these bugs will reappear, this
time caused by NMIs.

I don't have any good suggestions. Core scope MSRs are horrible because
you can't update them atomically.

At boot time you can fix it by ensuring the RMW will cause both threads
to write the same value (i.e. the modify is not dependent on the read
value, and that there is exactly one WRMSR in the entire kernel for this
MSR).

For runtime with multiple agendas going on, you need some kind of
spinlock because it's a plain concurrency problem.

~Andrew