[PATCH 5/7] riscv: dts: eswin: add hsp power domain
From: Pinkesh Vaghela
Date: Mon Jun 15 2026 - 08:21:11 EST
HSP CSR is inside the HSP power domain. HSP CFG clock must be enabled
to access the HSP CSR registers.
Add HSP power domain node to manage hsp cfg clock
Signed-off-by: Pinkesh Vaghela <pinkesh.vaghela@xxxxxxxxxxxxxx>
---
arch/riscv/boot/dts/eswin/eic7700.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/riscv/boot/dts/eswin/eic7700.dtsi b/arch/riscv/boot/dts/eswin/eic7700.dtsi
index 8798c50f7584..f8caf39616b2 100644
--- a/arch/riscv/boot/dts/eswin/eic7700.dtsi
+++ b/arch/riscv/boot/dts/eswin/eic7700.dtsi
@@ -252,6 +252,19 @@ plic: interrupt-controller@c000000 {
#interrupt-cells = <1>;
};
+ hsp_power_domain: bus@50400000 {
+ compatible = "simple-pm-bus";
+ ranges = <0x0 0x50400000 0x0 0x50400000 0x0 0xa0000>;
+ clocks = <&clk EIC7700_CLK_GATE_HSP_CFG_CLK>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ hsp_sp_csr: hsp-sp-top-csr@50440000 {
+ compatible = "eswin,eic7700-syscfg", "syscon";
+ reg = <0x0 0x50440000 0x0 0x2000>;
+ };
+ };
+
uart0: serial@50900000 {
compatible = "snps,dw-apb-uart";
reg = <0x0 0x50900000 0x0 0x10000>;
--
2.34.1