Re: [PATCH] arm64: dts: qcom: glymur: fix PCIe SMMU interrupts

[Konrad Dybcio]

On 6/11/26 9:00 PM, Bjorn Andersson wrote:
> The PCIe SMMUv3 wired interrupts are routed to GIC extended SPI INTIDs
> 4100, 4098 and 4096. Describe them as ESPIs with the ESPI-relative
> interrupt numbers instead of regular SPIs 964, 962 and 960.
> 
> Assisted-by: Codex:GPT-5.5
> Fixes: 41b6e8db400c ("arm64: dts: qcom: Introduce Glymur base dtsi")
> Signed-off-by: Bjorn Andersson <bjorn.andersson@xxxxxxxxxxxxxxxx>
> ---

Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxxxxxxxx>

Konrad