[GIT PULL] x86/microcode for v7.2-rc1
From: Borislav Petkov
Date: Mon Jun 15 2026 - 13:40:09 EST
Hi Linus,
please pull the x86/microcode lineup for v7.2-rc1.
This'll conflict with urgent changes I sent to you during the stabilization
phase so I'm adding a merge conflict resolution below JFYI.
Thx.
---
The following changes since commit 254f49634ee16a731174d2ae34bc50bd5f45e731:
Linux 7.1-rc1 (2026-04-26 14:19:00 -0700)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git tags/x86_microcode_for_v7.2_rc1
for you to fetch changes up to 098bcea71b8d257d80b0037b97b66070806600a5:
x86/microcode/AMD: Move the no-revision fixup to get_patch_level() (2026-06-04 08:55:58 -0700)
----------------------------------------------------------------
- Move the zero-revision fixup for AMD microcode to the patch level
retrieval function and restrict it to Zen family processors, ensuring
patch level arithmetic always operates on a valid revision
- Fix an incorrect comment about which CPUID bit is checked when
determining whether the microcode loader should be disabled
- Add the latest Intel microcode revision data for a broad range of
processor models and steppings and add the script which generates the
header of minimum expected Intel microcode revisions
----------------------------------------------------------------
Borislav Petkov (AMD) (1):
x86/microcode/AMD: Move the no-revision fixup to get_patch_level()
Sohil Mehta (2):
x86/microcode/intel: Refresh old_microcode defines with Nov 2025 release
scripts/x86/intel: Add a script to update the old microcode list
Xiaoyao Li (1):
x86/microcode: Fix comment in microcode_loader_disabled()
MAINTAINERS | 1 +
arch/x86/kernel/cpu/microcode/amd.c | 12 +-
arch/x86/kernel/cpu/microcode/core.c | 2 +-
arch/x86/kernel/cpu/microcode/intel-ucode-defs.h | 479 ++++++++++++-----------
scripts/update-intel-ucode-defs.py | 130 ++++++
5 files changed, 380 insertions(+), 244 deletions(-)
create mode 100755 scripts/update-intel-ucode-defs.py
---
diff --cc arch/x86/kernel/cpu/microcode/core.c
index f740b8f76490,68a1a893246c..0dd0c7241c57
--- a/arch/x86/kernel/cpu/microcode/core.c
+++ b/arch/x86/kernel/cpu/microcode/core.c
@@@ -119,10 -118,15 +119,10 @@@ bool __init microcode_loader_disabled(v
/*
* Disable when:
*
- * 1) The CPU does not support CPUID.
- */
- if (!cpuid_feature()) {
- dis_ucode_ldr = true;
- return dis_ucode_ldr;
- }
-
- /*
+ * 1) The CPU does not support CPUID, detected below in
+ * load_ucode_bsp().
+ *
- * 2) Bit 31 in CPUID[1]:ECX is clear
+ * 2) Bit 31 in CPUID[1]:ECX is set
* The bit is reserved for hypervisor use. This is still not
* completely accurate as XEN PV guests don't see that CPUID bit
* set, but that's good enough as they don't land on the BSP
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette