Re: [PATCH 04/12] dt-bindings: soc: fsl: qe: Add support of IRQ in QE GPIO

[Krzysztof Kozlowski]

On Mon, Jul 06, 2026 at 10:48:32AM +0200, Paul Louvel wrote:
> On Mon Jul 6, 2026 at 8:52 AM CEST, Krzysztof Kozlowski wrote:
> > On Fri, Jul 03, 2026 at 03:30:12PM +0200, Paul Louvel wrote:
> >> Some QE GPIO pins have an associated interrupt line in the QE PIC to
> >> signal state changes on the pin.  Add the corresponding
> >> interrupt-controller / nexus properties to the QE GPIO binding.
> >> 
> >> Because the GPIO controller does not perform any interrupt handling
> >> itself, a nexus node (interrupt-map) is used to map each GPIO line
> >> supporting IRQ to the parent QE PIC interrupt domain.
> >> 
> >> As the QE PIC can be configured to generate an interrupt on either a
> >> high-to-low transition or any change in signal state, three
> >> interrupt-map entries are needed per GPIO pin that can yield an
> >> interrupt (falling, both, and the "none" case which defaults to both in
> >> QE PIC).  This overhead is necessary because the interrupt-map-pass-thru
> >> property is not part of the DT specification.
> >> 
> >> The interrupt-map property is optional: it is not required for GPIO
> >> banks that have no interrupt capable GPIO line (e.g. port D on MPC8323),
> >> or when interrupt functionality is not used.
> >> 
> >> Update the example to show a scenario where each bank supports a
> >> different numbers of IRQs, or no IRQs at all.
> >> 
> >> Signed-off-by: Paul Louvel <paul.louvel@xxxxxxxxxxx>
> >> ---
> >>  .../bindings/gpio/fsl,mpc8323-qe-pario-bank.yaml   | 69 +++++++++++++++++++++-
> >>  1 file changed, 66 insertions(+), 3 deletions(-)
> >> 
> >> diff --git a/Documentation/devicetree/bindings/gpio/fsl,mpc8323-qe-pario-bank.yaml b/Documentation/devicetree/bindings/gpio/fsl,mpc8323-qe-pario-bank.yaml
> >> index 1af99339ff40..0c849a5698f4 100644
> >> --- a/Documentation/devicetree/bindings/gpio/fsl,mpc8323-qe-pario-bank.yaml
> >> +++ b/Documentation/devicetree/bindings/gpio/fsl,mpc8323-qe-pario-bank.yaml
> >> @@ -27,6 +27,17 @@ properties:
> >>    "#gpio-cells":
> >>      const: 2
> >>  
> >> +  "#address-cells":
> >> +    const: 0
> >> +
> >> +  "#interrupt-cells":
> >> +    const: 2
> >> +
> >
> > If this has interrupt-cells, then it is a nexus, thus why isn't this
> > also a "interrupt-controller"?
> 
> Because these these banks are not interrupt controllers.
> Interrupts are handled by the QE PIC, and the GPIO controller does not do any
> interrupt handling itself.
> In this setup, does it really needs an "interrupt-controller" property?

So this is interrupt-nexus, but not an interrupt-controller. If that's
the case of hardware, then it is fine/correct.

Best regards,
Krzysztof