Re: [PATCH v4 2/4] phy: qcom-qmp: Add v10 register offsets
From: Dmitry Baryshkov
Date: Wed Jul 08 2026 - 09:11:22 EST
On Tue, Jul 07, 2026 at 08:32:47PM +0000, Matthew Leung wrote:
> Hawi SoC uses v10 register definitions for PCIe Gen3 x2. Add the new
> register offset headers for all four sub-blocks:
>
> - QSERDES-COM offsets
> - QSERDES TX/RX offsets
> - PCS offsets
> - PCS PCIe-specific offsets
>
> Signed-off-by: Matthew Leung <matthew.leung@xxxxxxxxxxxxxxxx>
> ---
> drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 1 +
> drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v10.h | 18 ++++++++
> drivers/phy/qualcomm/phy-qcom-qmp-pcs-v10.h | 22 ++++++++++
> .../phy/qualcomm/phy-qcom-qmp-qserdes-com-v10.h | 49 ++++++++++++++++++++++
> .../phy/qualcomm/phy-qcom-qmp-qserdes-txrx-v10.h | 47 +++++++++++++++++++++
> drivers/phy/qualcomm/phy-qcom-qmp.h | 5 +++
> 6 files changed, 142 insertions(+)
>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxxxxxxxx>
--
With best wishes
Dmitry