[PATCH v3 07/20] media: imx355: Set binning mode registers programmatically

From: Dave Stevenson

Date: Wed Jul 08 2026 - 10:53:47 EST


Compute the binning registers based on the difference between
the mode width/height vs the crop width/height.

Signed-off-by: Dave Stevenson <dave.stevenson@xxxxxxxxxxxxxxx>
---
drivers/media/i2c/imx355.c | 61 +++++++++++++++-------------------------------
1 file changed, 19 insertions(+), 42 deletions(-)

diff --git a/drivers/media/i2c/imx355.c b/drivers/media/i2c/imx355.c
index 7aabd281cd3c..1010c32fe969 100644
--- a/drivers/media/i2c/imx355.c
+++ b/drivers/media/i2c/imx355.c
@@ -72,6 +72,10 @@
#define IMX355_TEST_PATTERN_GRAY_COLOR_BARS 3
#define IMX355_TEST_PATTERN_PN9 4

+#define IMX355_REG_BINNING_MODE 0x0900
+#define IMX355_REG_BINNING_TYPE 0x0901
+#define IMX355_REG_BINNING_WEIGHTING 0x0902
+
/* Flip Control */
#define IMX355_REG_ORIENTATION 0x0101

@@ -263,113 +267,71 @@ static const struct imx355_reg_list imx355_global_setting = {
};

static const struct imx355_reg mode_3268x2448_regs[] = {
- { 0x0900, 0x00 },
- { 0x0901, 0x11 },
- { 0x0902, 0x00 },
{ 0x0700, 0x00 },
{ 0x0701, 0x10 },
};

static const struct imx355_reg mode_3264x2448_regs[] = {
- { 0x0900, 0x00 },
- { 0x0901, 0x11 },
- { 0x0902, 0x00 },
{ 0x0700, 0x00 },
{ 0x0701, 0x10 },
};

static const struct imx355_reg mode_3280x2464_regs[] = {
- { 0x0900, 0x00 },
- { 0x0901, 0x11 },
- { 0x0902, 0x00 },
{ 0x0700, 0x00 },
{ 0x0701, 0x10 },
};

static const struct imx355_reg mode_1940x1096_regs[] = {
- { 0x0900, 0x00 },
- { 0x0901, 0x11 },
- { 0x0902, 0x00 },
{ 0x0700, 0x00 },
{ 0x0701, 0x10 },
};

static const struct imx355_reg mode_1936x1096_regs[] = {
- { 0x0900, 0x00 },
- { 0x0901, 0x11 },
- { 0x0902, 0x00 },
{ 0x0700, 0x00 },
{ 0x0701, 0x10 },
};

static const struct imx355_reg mode_1924x1080_regs[] = {
- { 0x0900, 0x00 },
- { 0x0901, 0x11 },
- { 0x0902, 0x00 },
{ 0x0700, 0x00 },
{ 0x0701, 0x10 },
};

static const struct imx355_reg mode_1920x1080_regs[] = {
- { 0x0900, 0x00 },
- { 0x0901, 0x11 },
- { 0x0902, 0x00 },
{ 0x0700, 0x00 },
{ 0x0701, 0x10 },
};

static const struct imx355_reg mode_1640x1232_regs[] = {
- { 0x0900, 0x01 },
- { 0x0901, 0x22 },
- { 0x0902, 0x00 },
{ 0x0700, 0x00 },
{ 0x0701, 0x10 },
};

static const struct imx355_reg mode_1640x922_regs[] = {
- { 0x0900, 0x01 },
- { 0x0901, 0x22 },
- { 0x0902, 0x00 },
{ 0x0700, 0x00 },
{ 0x0701, 0x10 },
};

static const struct imx355_reg mode_1300x736_regs[] = {
- { 0x0900, 0x01 },
- { 0x0901, 0x22 },
- { 0x0902, 0x00 },
{ 0x0700, 0x00 },
{ 0x0701, 0x10 },
};

static const struct imx355_reg mode_1296x736_regs[] = {
- { 0x0900, 0x01 },
- { 0x0901, 0x22 },
- { 0x0902, 0x00 },
{ 0x0700, 0x00 },
{ 0x0701, 0x10 },
};

static const struct imx355_reg mode_1284x720_regs[] = {
- { 0x0900, 0x01 },
- { 0x0901, 0x22 },
- { 0x0902, 0x00 },
{ 0x0700, 0x00 },
{ 0x0701, 0x10 },
};

static const struct imx355_reg mode_1280x720_regs[] = {
- { 0x0900, 0x01 },
- { 0x0901, 0x22 },
- { 0x0902, 0x00 },
{ 0x0700, 0x00 },
{ 0x0701, 0x10 },
};

static const struct imx355_reg mode_820x616_regs[] = {
- { 0x0900, 0x01 },
- { 0x0901, 0x44 },
- { 0x0902, 0x00 },
{ 0x0700, 0x02 },
{ 0x0701, 0x78 },
};
@@ -974,6 +936,7 @@ static int imx355_start_streaming(struct imx355 *imx355)
{
const struct imx355_reg_list *reg_list;
const struct imx355_mode *mode;
+ u8 binning_mode;
int ret;

/* Global Setting */
@@ -1019,6 +982,20 @@ static int imx355_start_streaming(struct imx355 *imx355)
if (ret)
return ret;

+ binning_mode = ((mode->crop.width / mode->width) << 4) |
+ (mode->crop.height / mode->height);
+ ret = imx355_write_reg(imx355, IMX355_REG_BINNING_MODE, 1,
+ binning_mode == 0x11 ? 0x00 : 0x01);
+ if (ret)
+ return ret;
+ ret = imx355_write_reg(imx355, IMX355_REG_BINNING_TYPE, 1,
+ binning_mode);
+ if (ret)
+ return ret;
+ ret = imx355_write_reg(imx355, IMX355_REG_BINNING_WEIGHTING, 1, 0x00);
+ if (ret)
+ return ret;
+
/* Set PLL registers for the external clock frequency */
ret = imx355_write_reg(imx355, IMX355_REG_EXTCLK_FREQ, 2,
imx355->clk_params->extclk_freq);

--
2.34.1