Re: [PATCH v3 3/6] arm64: dts: qcom: kodiak: Add GEM_NOC interconnect for adreno SMMU

[Bjorn Andersson]

On Wed, Jul 08, 2026 at 03:31:07PM +0530, Bibek Kumar Patro wrote:
> 
> 
> On 7/7/2026 10:14 PM, Dmitry Baryshkov wrote:
> > On Tue, Jul 07, 2026 at 06:37:24PM +0530, Bibek Kumar Patro wrote:
> > > 
> > > 
> > > On 7/6/2026 11:12 PM, Dmitry Baryshkov wrote:
> > > > On Mon, Jul 06, 2026 at 10:26:36PM +0530, Bibek Kumar Patro wrote:
> > > > > On Kodiak platforms, the Adreno SMMU requires a bandwidth vote on
> > > > > the GEM_NOC path (MASTER_GPU_TCU -> SLAVE_EBI1) before its registers
> > > > > are accessible. Without this vote, the SMMU may become unreachable,
> > > > > leading to intermittent probe failures and runtime issues.
> > > > > 
> > > > > Add the required interconnect to ensure reliable register access.
> > > > > 
> > > > > Signed-off-by: Bibek Kumar Patro <bibek.patro@xxxxxxxxxxxxxxxx>
> > > > > ---
> > > > >    arch/arm64/boot/dts/qcom/kodiak.dtsi | 2 ++
> > > > >    1 file changed, 2 insertions(+)
> > > > > 
> > > > > diff --git a/arch/arm64/boot/dts/qcom/kodiak.dtsi b/arch/arm64/boot/dts/qcom/kodiak.dtsi
> > > > > index 90e50c245c0c..721526f023dd 100644
> > > > > --- a/arch/arm64/boot/dts/qcom/kodiak.dtsi
> > > > > +++ b/arch/arm64/boot/dts/qcom/kodiak.dtsi
> > > > > @@ -3389,6 +3389,8 @@ adreno_smmu: iommu@3da0000 {
> > > > >    			power-domains = <&gpucc GPU_CC_CX_GDSC>;
> > > > >    			dma-coherent;
> > > > > +			interconnects = <&gem_noc MASTER_GPU_TCU QCOM_ICC_TAG_ALWAYS
> > > > > +					 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
> > > > 
> > > > Why is it ALWAYS? Would it be better to declare it as ACTIVE_ONLY and
> > > 
> > > Added QCOM_ICC_TAG_ALWAYS, to hold the vote in SLEEP bucket as well
> > > preventing gem_noc going to sleep when icc_set_bw is being called.
> > 
> > _why_?
> > 
> 
> Now when i think of where we implemented the hooks, ALWAYS is not needed. We
> should keep it ACTIVE_ONLY since we are already voting it
> back in resume pah. I'll fix it in next revision.
> 

The path is between the SMMU and DDR, so clearly it has to do with the
TCU's ability to fetch things from DDR.

ACTIVE_ONLY states that the vote should only be applied when the
application subsystem (CPUSS) is not in low-power mode (CPU is active).

So, are you saying that in all cases that cpuidle might select such
low-power state the GPU TCU is "stopped", and does not need to perform
any memory transactions?


To me these two are orthogonal and TAG_ALWAYS is logically correct, but
perhaps there's some practical dependency that I'm missing?

Regards,
Bjorn

> > > 
> > > > then drop the extra suspend/resume play?
> > > 
> > > Not sure if I understood it correctly.
> > > Did you mean the extra suspend/resume play in arm_smmu_runtime_suspend
> > > or in arm_smmu_device_shutdown() path?
> > 
> > runtime_suspend/resume. I might be incorrect here, but I think it is
> > exactly what you need.
> > 
> 
> Yes, I think we should go with the ACTIVE_ONLY flag and we would need
> this voting in suspend resume path (For the same reason mentioned in commit
> description and cover letter of the series).
> 
> ALWAYS would avoid the need for this handling, it would keep the vote active
> unnecessarily, but still that would have been nondeterministic.
> 
> Thanks & regards,
> Bibek
> 
> > > 
> > > Thanks & regards,
> > > Bibek
> > > 
> > > > 
> > > > >    		};
> > > > >    		gfx_0_tbu: tbu@3dd9000 {
> > > > > 
> > > > > -- 
> > > > > 2.34.1
> > > > > 
> > > > 
> > > 
> > 
>