Re: [PATCH v4 1/7] dt-bindings: serial: 8250: aspeed: add compatible string for ast2600
From: Krzysztof Kozlowski
Date: Thu Jul 09 2026 - 05:08:03 EST
On Wed, Jul 08, 2026 at 03:35:53PM +0000, Grégoire Layet wrote:
> The ast2600 was using the ast2500 vuart compatible string.
> Make it possible to have ast2600-specific properties.
Then add these properties here as well. Adding a new device is one
commit: its compatible and its properties.
>
> Signed-off-by: Grégoire Layet <gregoire.layet@xxxxxxxxxxxxx>
> ---
> .../devicetree/bindings/serial/8250.yaml | 24 ++++++++++++-------
> 1 file changed, 16 insertions(+), 8 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/serial/8250.yaml b/Documentation/devicetree/bindings/serial/8250.yaml
> index bb7b9c87a807..8f22121381fc 100644
> --- a/Documentation/devicetree/bindings/serial/8250.yaml
> +++ b/Documentation/devicetree/bindings/serial/8250.yaml
> @@ -23,7 +23,10 @@ allOf:
> then:
> properties:
> compatible:
> - const: aspeed,ast2500-vuart
> + contains:
> + enum:
> + - aspeed,ast2500-vuart
> + - aspeed,ast2600-vuart
> - if:
> properties:
> compatible:
> @@ -106,6 +109,9 @@ properties:
> - const: ns16850
> - const: aspeed,ast2400-vuart
> - const: aspeed,ast2500-vuart
> + - items:
> + - const: aspeed,ast2600-vuart
> + - const: aspeed,ast2500-vuart
> - const: intel,xscale-uart
> - const: mrvl,pxa-uart
> - const: nuvoton,wpcm450-uart
> @@ -287,17 +293,19 @@ properties:
> aspeed,sirq-polarity-sense:
> $ref: /schemas/types.yaml#/definitions/phandle-array
> description: |
> - Phandle to aspeed,ast2500-scu compatible syscon alongside register
> - offset and bit number to identify how the SIRQ polarity should be
> - configured. One possible data source is the LPC/eSPI mode bit. Only
> - applicable to aspeed,ast2500-vuart.
> + Phandle to aspeed,ast2500-scu or aspeed,ast2600-scu compatible syscon
This is a deprecated property, so it cannot apply to a new device -
aspeed,ast2600-vuart. You cannot use deprecated code for new bindings or
device support.
> + alongside register offset and bit number to identify how the SIRQ
> + polarity should be configured. One possible data source is the LPC/eSPI
> + mode bit. Only applicable to aspeed,ast2500-vuart and
> + aspeed,ast2600-vuart.
> deprecated: true
Best regards,
Krzysztof