[PATCH 6/9] media: iris: add VP8 decode support on Gen1 firmware

From: Dmitry Baryshkov

Date: Thu Jul 09 2026 - 15:39:16 EST


The Gen1 firmware supports decoding VP8, but the iris driver never
advertised or wired up the codec.

Add the VP8 HFI codec code, map V4L2_PIX_FMT_VP8 to it in the Gen1
session open path, and compute the VP8 internal buffer sizes (bin,
collocated motion vector, line and probability-table persist buffers,
which reuse the shared VPX helpers). Advertise the codec through the
Gen1 decode format list and register the VP8 profile menu control.

Assisted-by: Claude:claude-opus-4-8
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxxxxxxxx>
---
drivers/media/platform/qcom/iris/iris_ctrls.c | 7 +++
drivers/media/platform/qcom/iris/iris_hfi_gen1.c | 22 +++++++-
.../platform/qcom/iris/iris_hfi_gen1_command.c | 3 +
.../platform/qcom/iris/iris_hfi_gen1_defines.h | 1 +
.../platform/qcom/iris/iris_platform_common.h | 1 +
drivers/media/platform/qcom/iris/iris_vpu_buffer.c | 64 ++++++++++++++++++++++
drivers/media/platform/qcom/iris/iris_vpu_buffer.h | 3 +
7 files changed, 99 insertions(+), 2 deletions(-)

diff --git a/drivers/media/platform/qcom/iris/iris_ctrls.c b/drivers/media/platform/qcom/iris/iris_ctrls.c
index c12fe724dfb8..1bd6460a1b0a 100644
--- a/drivers/media/platform/qcom/iris/iris_ctrls.c
+++ b/drivers/media/platform/qcom/iris/iris_ctrls.c
@@ -28,6 +28,8 @@ static enum platform_inst_fw_cap_type iris_get_cap_id(u32 id)
return PROFILE_HEVC;
case V4L2_CID_MPEG_VIDEO_VP9_PROFILE:
return PROFILE_VP9;
+ case V4L2_CID_MPEG_VIDEO_VP8_PROFILE:
+ return PROFILE_VP8;
case V4L2_CID_MPEG_VIDEO_H264_LEVEL:
return LEVEL_H264;
case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:
@@ -171,6 +173,8 @@ static u32 iris_get_v4l2_id(enum platform_inst_fw_cap_type cap_id)
return V4L2_CID_MPEG_VIDEO_HEVC_PROFILE;
case PROFILE_VP9:
return V4L2_CID_MPEG_VIDEO_VP9_PROFILE;
+ case PROFILE_VP8:
+ return V4L2_CID_MPEG_VIDEO_VP8_PROFILE;
case LEVEL_H264:
return V4L2_CID_MPEG_VIDEO_H264_LEVEL;
case LEVEL_HEVC:
@@ -558,6 +562,9 @@ int iris_set_profile(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_
if (inst->codec == V4L2_PIX_FMT_H264) {
hfi_id = inst->fw_caps[PROFILE_H264].hfi_id;
hfi_value = inst->fw_caps[PROFILE_H264].value;
+ } else if (inst->codec == V4L2_PIX_FMT_VP8) {
+ hfi_id = inst->fw_caps[PROFILE_VP8].hfi_id;
+ hfi_value = inst->fw_caps[PROFILE_VP8].value;
} else {
hfi_id = inst->fw_caps[PROFILE_HEVC].hfi_id;
hfi_value = inst->fw_caps[PROFILE_HEVC].value;
diff --git a/drivers/media/platform/qcom/iris/iris_hfi_gen1.c b/drivers/media/platform/qcom/iris/iris_hfi_gen1.c
index 8119c639ec24..4c3aa5a03ddd 100644
--- a/drivers/media/platform/qcom/iris/iris_hfi_gen1.c
+++ b/drivers/media/platform/qcom/iris/iris_hfi_gen1.c
@@ -30,6 +30,17 @@ static const struct platform_inst_fw_cap inst_fw_cap_sm8250_dec[] = {
.hfi_id = HFI_PROPERTY_PARAM_WORK_MODE,
.set = iris_set_stage,
},
+ {
+ .cap_id = PROFILE_VP8,
+ .min = V4L2_MPEG_VIDEO_VP8_PROFILE_0,
+ .max = V4L2_MPEG_VIDEO_VP8_PROFILE_3,
+ .step_or_mask = BIT(V4L2_MPEG_VIDEO_VP8_PROFILE_0) |
+ BIT(V4L2_MPEG_VIDEO_VP8_PROFILE_1) |
+ BIT(V4L2_MPEG_VIDEO_VP8_PROFILE_2) |
+ BIT(V4L2_MPEG_VIDEO_VP8_PROFILE_3),
+ .value = V4L2_MPEG_VIDEO_VP8_PROFILE_0,
+ .flags = CAP_FLAG_MENU,
+ },
};

static const struct platform_inst_fw_cap inst_fw_cap_sm8250_enc[] = {
@@ -423,6 +434,13 @@ static const u32 iris_hfi_gen1_dec_fmts[] = {
V4L2_PIX_FMT_H264,
V4L2_PIX_FMT_HEVC,
V4L2_PIX_FMT_VP9,
+ V4L2_PIX_FMT_VP8,
+};
+
+static const u32 iris_hfi_gen1_ar50lt_dec_fmts[] = {
+ V4L2_PIX_FMT_H264,
+ V4L2_PIX_FMT_HEVC,
+ V4L2_PIX_FMT_VP9,
};

const struct iris_firmware_data iris_hfi_gen1_data = {
@@ -677,8 +695,8 @@ const struct iris_firmware_data iris_hfi_gen1_ar50lt_data = {
.inst_fw_caps_enc = inst_fw_cap_gen1_ar50lt_enc,
.inst_fw_caps_enc_size = ARRAY_SIZE(inst_fw_cap_gen1_ar50lt_enc),

- .dec_fmts = iris_hfi_gen1_dec_fmts,
- .dec_fmts_size = ARRAY_SIZE(iris_hfi_gen1_dec_fmts),
+ .dec_fmts = iris_hfi_gen1_ar50lt_dec_fmts,
+ .dec_fmts_size = ARRAY_SIZE(iris_hfi_gen1_ar50lt_dec_fmts),

.dec_input_config_params_default =
sm8250_vdec_input_config_param_default,
diff --git a/drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c b/drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c
index ed9fef2aec08..90645ed3e0d8 100644
--- a/drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c
+++ b/drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c
@@ -105,6 +105,9 @@ static int iris_hfi_gen1_session_open(struct iris_inst *inst)
case V4L2_PIX_FMT_HEVC:
codec = HFI_VIDEO_CODEC_HEVC;
break;
+ case V4L2_PIX_FMT_VP8:
+ codec = HFI_VIDEO_CODEC_VP8;
+ break;
case V4L2_PIX_FMT_VP9:
codec = HFI_VIDEO_CODEC_VP9;
break;
diff --git a/drivers/media/platform/qcom/iris/iris_hfi_gen1_defines.h b/drivers/media/platform/qcom/iris/iris_hfi_gen1_defines.h
index 2702f255bc04..13c8ff59d6e4 100644
--- a/drivers/media/platform/qcom/iris/iris_hfi_gen1_defines.h
+++ b/drivers/media/platform/qcom/iris/iris_hfi_gen1_defines.h
@@ -14,6 +14,7 @@
#define HFI_SESSION_TYPE_DEC 2

#define HFI_VIDEO_CODEC_H264 0x00000002
+#define HFI_VIDEO_CODEC_VP8 0x00001000
#define HFI_VIDEO_CODEC_HEVC 0x00002000
#define HFI_VIDEO_CODEC_VP9 0x00004000

diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/drivers/media/platform/qcom/iris/iris_platform_common.h
index 317ba48e6305..84017b66e98f 100644
--- a/drivers/media/platform/qcom/iris/iris_platform_common.h
+++ b/drivers/media/platform/qcom/iris/iris_platform_common.h
@@ -115,6 +115,7 @@ enum platform_inst_fw_cap_type {
PROFILE_H264 = 1,
PROFILE_HEVC,
PROFILE_VP9,
+ PROFILE_VP8,
LEVEL_H264,
LEVEL_HEVC,
LEVEL_VP9,
diff --git a/drivers/media/platform/qcom/iris/iris_vpu_buffer.c b/drivers/media/platform/qcom/iris/iris_vpu_buffer.c
index 88f130d09a6e..ca90414e6c19 100644
--- a/drivers/media/platform/qcom/iris/iris_vpu_buffer.c
+++ b/drivers/media/platform/qcom/iris/iris_vpu_buffer.c
@@ -293,6 +293,11 @@ static u32 hfi_buffer_persist_vp9d(void)
HDR10_HIST_EXTRADATA_SIZE;
}

+static u32 hfi_buffer_persist_vp8d(void)
+{
+ return ALIGN(VP8_NUM_PROBABILITY_TABLE_BUF * VP8_PROB_TABLE_SIZE, DMA_ALIGNMENT);
+}
+
static u32 hfi_buffer_persist_vp9d_ar50lt(void)
{
return ALIGN(VP9_NUM_PROBABILITY_TABLE_BUF * VP9_PROB_TABLE_SIZE, DMA_ALIGNMENT) +
@@ -715,6 +720,57 @@ u32 hfi_buffer_line_vp9d(u32 frame_width, u32 frame_height, u32 _yuv_bufcount_mi
return _lb_size + vpss_lb_size + 4096;
}

+static inline
+u32 size_vp8d_lb_fe_top_data(u32 frame_width, u32 frame_height)
+{
+ return (ALIGN(frame_width, 16) + 8) * 10 * 2;
+}
+
+static inline
+u32 size_vp8d_lb_pe_top_data(u32 frame_width, u32 frame_height)
+{
+ return (ALIGN(frame_width, 16) >> 4) * 64;
+}
+
+static inline
+u32 size_vp8d_lb_vsp_top(u32 frame_width, u32 frame_height)
+{
+ return ((ALIGN(frame_width, 16) >> 4) * 64 / 2) + 256;
+}
+
+static inline
+u32 hfi_iris_vp8d_lb_size(u32 frame_width, u32 frame_height, u32 num_vpp_pipes)
+{
+ return ALIGN(size_vpxd_lb_fe_left_ctrl(frame_width, frame_height), DMA_ALIGNMENT) * num_vpp_pipes +
+ ALIGN(size_vpxd_lb_se_left_ctrl(frame_width, frame_height), DMA_ALIGNMENT) * num_vpp_pipes +
+ ALIGN(size_vp8d_lb_vsp_top(frame_width, frame_height), DMA_ALIGNMENT) +
+ ALIGN(size_vpxd_lb_fe_top_ctrl(frame_width, frame_height), DMA_ALIGNMENT) +
+ 2 * ALIGN(size_vpxd_lb_recon_dma_metadata_wr(frame_width, frame_height), DMA_ALIGNMENT) +
+ ALIGN(size_vpxd_lb_se_top_ctrl(frame_width, frame_height), DMA_ALIGNMENT) +
+ ALIGN(size_vp8d_lb_pe_top_data(frame_width, frame_height), DMA_ALIGNMENT) +
+ ALIGN(size_vp8d_lb_fe_top_data(frame_width, frame_height), DMA_ALIGNMENT);
+}
+
+static inline
+u32 hfi_buffer_line_vp8d(u32 frame_width, u32 frame_height, bool is_opb, u32 num_vpp_pipes)
+{
+ u32 vpss_lb_size = 0;
+ u32 _lb_size;
+
+ _lb_size = hfi_iris_vp8d_lb_size(frame_width, frame_height, num_vpp_pipes);
+
+ if (is_opb)
+ vpss_lb_size = size_vpss_lb(frame_width, frame_height);
+
+ return _lb_size + vpss_lb_size;
+}
+
+static inline
+u32 hfi_iris_vp8d_comv_size(u32 frame_width, u32 frame_height)
+{
+ return DIV_ROUND_UP(frame_width, 16) * DIV_ROUND_UP(frame_height, 16) * 8 * 2;
+}
+
static u32 hfi_buffer_line_h264d(u32 frame_width, u32 frame_height,
bool is_opb, u32 num_vpp_pipes)
{
@@ -950,6 +1006,8 @@ static u32 iris_vpu_dec_bin_size(struct iris_inst *inst)
return hfi_buffer_bin_h265d(width, height, num_vpp_pipes);
else if (inst->codec == V4L2_PIX_FMT_VP9)
return hfi_buffer_bin_vp9d(width, height, num_vpp_pipes);
+ else if (inst->codec == V4L2_PIX_FMT_VP8)
+ return hfi_buffer_bin_vp9d(width, height, num_vpp_pipes);
else if (inst->codec == V4L2_PIX_FMT_AV1)
return hfi_buffer_bin_av1d(width, height, num_vpp_pipes);

@@ -983,6 +1041,8 @@ static u32 iris_vpu_dec_comv_size(struct iris_inst *inst)
return hfi_buffer_comv_h264d(width, height, num_comv);
else if (inst->codec == V4L2_PIX_FMT_HEVC)
return hfi_buffer_comv_h265d(width, height, num_comv);
+ else if (inst->codec == V4L2_PIX_FMT_VP8)
+ return hfi_iris_vp8d_comv_size(width, height);

return 0;
}
@@ -1021,6 +1081,8 @@ static u32 iris_vpu_dec_persist_size(struct iris_inst *inst)
return hfi_buffer_persist_h265d(0);
else if (inst->codec == V4L2_PIX_FMT_VP9)
return hfi_buffer_persist_vp9d();
+ else if (inst->codec == V4L2_PIX_FMT_VP8)
+ return hfi_buffer_persist_vp8d();
else if (inst->codec == V4L2_PIX_FMT_AV1) {
caps = inst->core->iris_platform_data->inst_caps;
if (inst->fw_caps[DRAP].value)
@@ -1101,6 +1163,8 @@ static u32 iris_vpu_dec_line_size(struct iris_inst *inst)
else if (inst->codec == V4L2_PIX_FMT_VP9)
return hfi_buffer_line_vp9d(width, height, out_min_count, is_opb,
num_vpp_pipes);
+ else if (inst->codec == V4L2_PIX_FMT_VP8)
+ return hfi_buffer_line_vp8d(width, height, is_opb, num_vpp_pipes);
else if (inst->codec == V4L2_PIX_FMT_AV1)
return hfi_buffer_line_av1d(width, height, is_opb, num_vpp_pipes);

diff --git a/drivers/media/platform/qcom/iris/iris_vpu_buffer.h b/drivers/media/platform/qcom/iris/iris_vpu_buffer.h
index 2085e316a6bd..684b459c0cad 100644
--- a/drivers/media/platform/qcom/iris/iris_vpu_buffer.h
+++ b/drivers/media/platform/qcom/iris/iris_vpu_buffer.h
@@ -66,6 +66,9 @@ struct iris_inst;
#define MAX_SE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE_AR50LT (32 / 8)
#define VP9_UDC_HEADER_BUF_SIZE (3 * 128)

+#define VP8_NUM_PROBABILITY_TABLE_BUF (5 + 1)
+#define VP8_PROB_TABLE_SIZE (3840)
+
#define SIZE_SEI_USERDATA 4096
#define SIZE_DOLBY_RPU_METADATA (41 * 1024)
#define H264_CABAC_HDR_RATIO_HD_TOT 1

--
2.47.3