Re: [PATCH v2 6/6] arm64: cpufeature: Detect BBML3 based on MMFR2 ID
From: Anshuman Khandual
Date: Fri Jul 10 2026 - 03:16:18 EST
Please do mention full register field here
arm64: cpufeature: Detect BBML3 based on ID_AA64MMFR2_EL1.BBM
On 08/07/26 8:13 PM, Linu Cherian wrote:
> Add MMFR2 ID based BBML3 feature detection, so
Ditto ^^^^^^^^^^^^
> that compliant cpus doesn't need to be added to the
> midr list.
Could be reworded as :
Add ID_AA64MMFR2_EL1.BBM based BBML3 feature detection in
cpu_supports_bbml3() so that cpus with the feature would
not have to be added into MIDR based supports_bbml3_list.
>
> Signed-off-by: Linu Cherian <linu.cherian@xxxxxxx>
> ---
> arch/arm64/kernel/cpufeature.c | 17 +++++++++--------
> 1 file changed, 9 insertions(+), 8 deletions(-)
>
> diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
> index e9ecaa036479..3f4a36f152d0 100644
> --- a/arch/arm64/kernel/cpufeature.c
> +++ b/arch/arm64/kernel/cpufeature.c
> @@ -2133,6 +2133,12 @@ static bool hvhe_possible(const struct arm64_cpu_capabilities *entry,
>
> bool cpu_supports_bbml3(void)
> {
> + u64 mmfr2;
> +
> + mmfr2 = __read_sysreg_by_encoding(SYS_ID_AA64MMFR2_EL1);
> + if (SYS_FIELD_GET(ID_AA64MMFR2_EL1, BBM, mmfr2) >= ID_AA64MMFR2_EL1_BBM_3)
> + return true;
> +
> /* CPUs that support BBML3 but dont advertise through MMFR2 ID */
> static const struct midr_range supports_bbml3_list[] = {
> MIDR_REV_RANGE(MIDR_CORTEX_X4, 0, 3, 0xf),
> @@ -2153,15 +2159,10 @@ bool cpu_supports_bbml3(void)
> {}
> };
>
> - if (!is_midr_in_range_list(supports_bbml3_list))
> - return false;
> -
> - /*
> - * We currently ignore the ID_AA64MMFR2_EL1 register, and only care
> - * about whether the MIDR check passes.
> - */
> + if (is_midr_in_range_list(supports_bbml3_list))
> + return true;
>
> - return true;
> + return false;
> }
>
> static bool has_bbml3(const struct arm64_cpu_capabilities *caps, int scope)
With the minor changes to the commit message above.
Reviewed-by: Anshuman Khandual <anshuman.khandual@xxxxxxx>