Re: [PATCH 6/6] clk: renesas: r9a08g046: Add clock and reset entries for LVDS
From: Geert Uytterhoeven
Date: Fri Jul 10 2026 - 11:50:46 EST
On Fri, 19 Jun 2026 at 18:40, Biju <biju.das.au@xxxxxxxxx> wrote:
> From: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
>
> Add clock and reset entries for LVDS.
>
> Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
> ---
> drivers/clk/renesas/r9a08g046-cpg.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/clk/renesas/r9a08g046-cpg.c b/drivers/clk/renesas/r9a08g046-cpg.c
> index 7cea2c6d2c42..273e147dca7a 100644
> --- a/drivers/clk/renesas/r9a08g046-cpg.c
> +++ b/drivers/clk/renesas/r9a08g046-cpg.c
> @@ -574,6 +574,10 @@ static const struct rzg2l_mod_clk r9a08g046_mod_clks[] = {
> MSTOP(BUS_MCPU3, BIT(11))),
> DEF_MOD("rsci3_tclk", R9A08G046_RSCI3_TCLK, R9A08G046_CLK_P16, 0x618, 11,
> MSTOP(BUS_MCPU3, BIT(12))),
> + DEF_MOD("lvds_pllclk", R9A08G046_LVDS_PLLCLK, R9A08G046_CLK_M2, 0x61c, 0,
> + MSTOP(BUS_PERI_VIDEO, BIT(11))),
> + DEF_MOD("lvds_clk_dot0", R9A08G046_LVDS_CLK_DOT0, R9A08G046_CLK_M3, 0x61c, 1,
> + MSTOP(BUS_PERI_VIDEO, BIT(11))),
> };
>
> static const struct rzg2l_reset r9a08g046_resets[] = {
> @@ -637,6 +641,7 @@ static const struct rzg2l_reset r9a08g046_resets[] = {
> DEF_RST(R9A08G046_RSCI1_TRESETN, 0x918, 9),
> DEF_RST(R9A08G046_RSCI2_TRESETN, 0x918, 10),
> DEF_RST(R9A08G046_RSCI3_TRESETN, 0x918, 11),
> + DEF_RST(R9A08G046_LVDS_RESET_N, 0x91c, 0),
> };
>
> static const unsigned int r9a08g046_crit_mod_clks[] __initconst = {
> --
> 2.43.0
>
--
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds