Re: [PATCH 2/8] x86/pci: move Intel chipset quirks to arch/x86/pci/fixup.c

[Lukas Wunner]

On Tue, Jul 07, 2026 at 03:17:54PM -0700, Rosen Penev wrote:
> Move Intel-specific PCI quirk handlers from drivers/pci/quirks.c to
> arch/x86/pci/fixup.c, where they logically belong as x86 platform code.
> The affected categories are:
> 
> - I82371FB PIIX3 passive release (quirk_passive_release)
> - 82437/82439 Triton PCI/PCI transfer limit (quirk_triton)
> - 82441/82443 Natoma PCI/PCI transfer limit (quirk_natoma)
> - PIIX4 ACPI/SMB IO region decode (quirk_piix4_acpi)
> - ICH4/ICH5 LPC ACPI & GPIO decode (quirk_ich4_lpc_acpi)
> - ICH6 LPC ACPI/GPIO & generic IO decode (quirk_ich6_lpc, ich6_lpc_acpi_gpio,
>   ich6_lpc_generic_decode)

These are all 32-bit chipsets.  We don't need to compile them into
modern 64-bit kernels.  They should be #ifdef'ed to CONFIG_X86_32,
or better yet, moved to a separate fixup_32.c file to reduce clutter
and make it easier to deprecate and remove 32-bit support one day.

However, I vaguely remember that some Intel chipsets of that day were
paired with DEC Alpha.  Triton maybe?

E.g. The Retro Web has some grainy Alpha motherboard pictures
and there are Intel chips soldered to those boards:

https://theretroweb.com/motherboards?itemsPerPage=24&chipsetIds[]=1886

I wouldn't be surprised if Intel PCI bridges such as 82380FB were
used on non-x86 boards like these.

And I'm definitely not surprised that LLMs think these are x86 only.
You'd have to train them with old data sheets, manuals, magazines,
otherwise they're just as clueless as anyone who hasn't lived through
that era.

> - ICH7-10 LPC generic IO decode (quirk_ich7_lpc, ich7_lpc_generic_decode)

ICH7 was used with Core Duo from 2006, I believe that was the first
southbridge to be paired with a 64-bit CPU.

Thanks,

Lukas