Re: [PATCH v2 7/8] clk: sunxi-ng: a733: Add bus clock gates

[Junhui Liu]

On Sat Jul 11, 2026 at 4:10 PM CST, Junhui Liu wrote:

[...]

> +
> +static SUNXI_CCU_GATE_HWS(mbus_iommu1_sys_clk, "mbus-iommu1-sys", mbus_hws, 0x5b4, BIT(0), 0);
> +static SUNXI_CCU_GATE_HWS(apb_iommu1_sys_clk, "apb_iommu1-sys", apb0_hws, 0x5b4, BIT(1), 0);
> +static SUNXI_CCU_GATE_HWS(ahb_iommu1_sys_clk, "ahb_iommu1-sys", ahb_hws, 0x5b4, BIT(2), 0);

The clock names here should be "apb-iommu1-sys" and "ahb-iommu1-sys". I
will update them in next version.

-- 
Best regards,
Junhui Liu