Re: [PATCH v2 4/4] arm64: dts: qcom: shikra: Add support for AudioCoreCC and AudioCoreCSR nodes
From: Imran Shaik
Date: Mon Jul 13 2026 - 08:10:54 EST
On 09-07-2026 05:30 pm, Konrad Dybcio wrote:
On 7/8/26 8:25 PM, Imran Shaik wrote:
Add support for Audio Core Clock Controller (AudioCoreCC) and Audio Core
CSR nodes on Qualcomm Shikra SoC. The Audio Core Clocks and Resets support
differs across Shikra variants based on Audio subsystem enablement as
follows:
- CQM variant: The QAIF driver runs on HLOS, hence both clocks and resets
are required to be supported on HLOS.
- CQS variant: The QAIF driver runs on the Modem, and required clocks are
handled on Modem, so from HLOS only resets are needed.
- IQS variant: no soundwire codes, hence no clocks/resets are needed.
Signed-off-by: Imran Shaik <imran.shaik@xxxxxxxxxxxxxxxx>
---
For the sake of simplification, can the resets be enabled
globally by default?
By default (PoR), those resets are under HW control. For audio use cases, software desserts/asserts for switching to SW control. Hence, these cannot be enabled globally by default.
Thanks,
Imran