Re: [RFC PATCH v3 04/27] x86/apic: Use AVIC_INCOMPLETE_IPI VMGEXIT for Secure AVIC IPI handling

[Naveen N Rao]

On Mon, Jul 13, 2026 at 12:59:50PM -0500, Tom Lendacky wrote:
> On 7/8/26 01:32, Naveen N Rao (AMD) wrote:
> > x2apic_savic driver currently uses SVM_EXIT_MSR to have the hypervisor
> > emulate ICR writes and to be able to deliver IPIs. However, the driver
> > also sets APIC_IRR in the APIC backing page of the target vCPU, so the
> > expectation is only for the hypervisor to notify/wake up the target
> > vCPU.
> > 
> > This is incorrect since SVM_EXIT_MSR is for requesting full emulation of
> > a certain MSR access -- and hypervisors expect to be able to _inject_
> > (set APIC_IRR) *and* deliver the interrupt to the target. This can
> > result in duplicate interrupts at the guest (assuming the guest is
> > allowing that vector to be injected by the hypervisor).
> > 
> > Instead, have the driver do AVIC_INCOMPLETE_IPI exit so that it is clear
> > on what the hypervisor needs to do. This is the same exit used by SVM
> > AVIC when it has already set APIC_IRR in the target vCPU APIC backing
> > page to request the hypervisor to send an AVIC doorbell/wake up the
> > target vCPU. Add the newly added exit ID AVIC_IPI_FAILURE_UNACCELERATED
> > (ID number 5) and use the same to signal that this is a Secure AVIC
> > access that is not accelerated by hardware.
> 
> Except that the GHCB specification doesn't have this support, so you can't
> really do this. And if you want it to be part of the GHCB spec it will
> need to be a new feature bit at this point so that the guest knows that
> the hypervisor can support this new exit code.

Yes, will drop this patch for now (and the related KVM patch #22).

> 
> With the current guest code, can't the hypervisor support know that for
> Secure AVIC it only needs to schedule the vCPU since it is assumed the
> guest updated the target backing page?

I have more fully explained this in patch #22 of this series, but TL;DR: 
I don't think it is correct to special case SVM_EXIT_MSR(APIC_ICR) 
handling in the hypervisor for Secure AVIC guests. Especially because 
there is no reason full emulation of APIC_ICR WRMSR can't work if the 
guest allows IPIs to be injected. i.e., this should be a guest decision 
and so, having a way to differentiate the guest request will make the 
hypervisor changes simpler and more straightforward.


Thanks,
Naveen