Re: [PATCH] phy: rockchip: naneng-combphy: Set RK3576 USB3 SSC downward

[Alexey Charkov]

On Tue, Jul 14, 2026 at 10:46 AM Liu Changjie <liucj1228@xxxxxxxxxxx> wrote:
>
> Program the RK3576 USB3 spread-spectrum direction to downward before
> applying the remaining PHY tuning. This matches the vendor BSP SSC
> direction and follows the existing RK3568 handling in this driver.
>
> Without this setting, a HIKSEMI MD202 (0bda:9210) repeatedly failed
> to accept a USB address on an RK3576 Taishan Pi 3M. With it, the same
> device enumerates at 5 Gbit/s and completes a 64 MiB read/write test.
>
> A separate 1 GiB stress test with this RTL9210-based enclosure still
> produced SuperSpeed resets and I/O timeouts. This change only addresses
> the initial link behavior and does not claim to fix sustained-I/O
> stability.
>
> Signed-off-by: Liu Changjie <liucj1228@xxxxxxxxxxx>
> ---
>  drivers/phy/rockchip/phy-rockchip-naneng-combphy.c | 5 +++++
>  1 file changed, 5 insertions(+)
>
> diff --git a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
> index 2b0f152f5..324a0861e 100644
> --- a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
> +++ b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
> @@ -1015,6 +1015,11 @@ static int rk3576_combphy_cfg(struct rockchip_combphy_priv *priv)
>                 break;
>
>         case PHY_TYPE_USB3:
> +               /* Set SSC downward spread spectrum */
> +               val = FIELD_PREP(RK3568_PHYREG32_SSC_MASK, RK3568_PHYREG32_SSC_DOWNWARD);
> +               rockchip_combphy_updatel(priv, RK3568_PHYREG32_SSC_MASK, val,
> +                                        RK3568_PHYREG32);
> +

This duplicates code which already exists in the
rk_combphy_common_cfg_ssc() helper function.

Could you please try if [1] fixes your use case?

[1] https://lore.kernel.org/linux-rockchip/20260714-naneng-ssc-fix-v1-1-1c40a58061ae@xxxxxxxxxxx/

Best regards,
Alexey