[PATCH 4/9] arm64: dts: imx8ulp: Add assigned clock properties for LPUART nodes

From: Peng Fan (OSS)

Date: Wed Jul 15 2026 - 08:37:26 EST


From: Peng Fan <peng.fan@xxxxxxx>

Add assigned-clocks, assigned-clock-parents and assigned-clock-rates
properties to lpuart4 through lpuart7, so the LPUART input clock is
configured automatically by the clock framework during probe.

Signed-off-by: Peng Fan <peng.fan@xxxxxxx>
---
arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
index 173d11dea5d4f..80e08ecb38490 100644
--- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
@@ -413,6 +413,9 @@ lpuart4: serial@29390000 {
interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&pcc3 IMX8ULP_CLK_LPUART4>;
clock-names = "ipg";
+ assigned-clocks = <&pcc3 IMX8ULP_CLK_LPUART4>;
+ assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>;
+ assigned-clock-rates = <48000000>;
dmas = <&edma1 55 0 FSL_EDMA_RX>, <&edma1 56 0 0> ;
dma-names = "rx", "tx";
status = "disabled";
@@ -424,6 +427,9 @@ lpuart5: serial@293a0000 {
interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&pcc3 IMX8ULP_CLK_LPUART5>;
clock-names = "ipg";
+ assigned-clocks = <&pcc3 IMX8ULP_CLK_LPUART5>;
+ assigned-clock-parents = <&cgc1 IMX8ULP_CLK_SOSC_DIV2>;
+ assigned-clock-rates = <24000000>;
dmas = <&edma1 57 0 FSL_EDMA_RX>, <&edma1 58 0 0> ;
dma-names = "rx", "tx";
status = "disabled";
@@ -529,6 +535,9 @@ lpuart6: serial@29860000 {
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&pcc4 IMX8ULP_CLK_LPUART6>;
clock-names = "ipg";
+ assigned-clocks = <&pcc4 IMX8ULP_CLK_LPUART6>;
+ assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>;
+ assigned-clock-rates = <48000000>;
dmas = <&edma1 59 0 FSL_EDMA_RX>, <&edma1 60 0 0>;
dma-names = "rx", "tx";
status = "disabled";
@@ -540,6 +549,9 @@ lpuart7: serial@29870000 {
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&pcc4 IMX8ULP_CLK_LPUART7>;
clock-names = "ipg";
+ assigned-clocks = <&pcc4 IMX8ULP_CLK_LPUART7>;
+ assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>;
+ assigned-clock-rates = <48000000>;
dmas = <&edma1 61 0 FSL_EDMA_RX>, <&edma1 62 0 0>;
dma-names = "rx", "tx";
status = "disabled";

--
2.34.1