Re: [RFC PATCH] ASoC: qcom: q6apm-lpass-dais: start the graph at prepare

[Jorijn van der Graaf]

On Tue, Jul 14, 2026 at 05:22:51PM +0100, Srinivas Kandagatla wrote:
> IBIT clocks should start clocking once we vote for it using prm.
> Do you see any errors while enabling this clock?

That answers the question from my previous mail - thank you. And I
see no errors anywhere in that path. A refused vote would also have
been visible: a DSP error or timeout fails clk_prepare_enable() and
aborts hw_params. Here hw_params completes, the stream plays, and
clk_summary shows the clock prepared and enabled at the requested
1536000 during the stream, so the DSP accepted the request and
reported success.

In case it helps the comparison on your hardware, the exact setup
here: LPASS_CLK_ID_SEN_MI2S_IBIT with LPASS_CLK_ATTRIBUTE_COUPLE_NO
at 1536000 Hz (48 kHz x 2 ch x 16 bit), voted at hw_params via the
MI2S clock control series - v3 at the time; the v3->v5 changes to
that path (clk_set_rate error check, cleanup) do not change the
enable sequence, so the result should carry over. The codec's
failing clock check runs at DAPM power-up during prepare, i.e. after
the vote, before the trigger-time graph start. The ADSP firmware
here reports QC_IMAGE_VERSION LPAIDSP.HT.1.0-01111-LANAI-1 (variant
milos.adsp.prodQ).

> This week, I will try to pull some wires out and check that on my
> hardware too.

That comparison should tell us which side to look at. If your board
does drive the bit clock from the vote alone, I am happy to dig on
the milos side; any pointer on what to check next would be welcome.

Thanks,
Jorijn