[PATCH 4/6] riscv: dts: spacemit: add USB2.0 controller nodes for K1

From: Junzhong Pan

Date: Wed Aug 12 2026 - 05:37:18 EST


The SpacemiT K1 SoC has two ChipIdea USB2.0 controllers.
- USB2.0 Dual-Role
- usb2.0 Host Only

Add the controller and PHY nodes.

Signed-off-by: Junzhong Pan <panjunzhong@xxxxxxxxxxxxxxxxxx>
---
arch/riscv/boot/dts/spacemit/k1.dtsi | 40 ++++++++++++++++++++++++++++++++++++
1 file changed, 40 insertions(+)

diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi
index 08a0f28d011f..aa35a3489250 100644
--- a/arch/riscv/boot/dts/spacemit/k1.dtsi
+++ b/arch/riscv/boot/dts/spacemit/k1.dtsi
@@ -449,6 +449,22 @@ syscon_rcpu2: system-controller@c0888000 {
#reset-cells = <1>;
};

+ usbphy0: phy@c0940000 {
+ compatible = "spacemit,k1-usb2-phy";
+ reg = <0x0 0xc0940000 0x0 0x200>;
+ clocks = <&syscon_apmu CLK_USB_AXI>;
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+
+ usbphy1: phy@c09c0000 {
+ compatible = "spacemit,k1-usb2-phy";
+ reg = <0x0 0xc09c0000 0x0 0x200>;
+ clocks = <&syscon_apmu CLK_USB_P1>;
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+
usbphy2: phy@c0a30000 {
compatible = "spacemit,k1-usb2-phy";
reg = <0x0 0xc0a30000 0x0 0x200>;
@@ -1291,6 +1307,30 @@ storage-bus {
#size-cells = <2>;
dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>;

+ usb2_0: usb@c0900000 {
+ compatible = "spacemit,k1-usb2";
+ reg = <0x0 0xc0900000 0x0 0x4100>;
+ interrupts = <105>;
+ clocks = <&syscon_apmu CLK_USB_AXI>;
+ resets = <&syscon_apmu RESET_USB_AXI>;
+ phys = <&usbphy0>;
+ phy-names = "usb-phy";
+ dr_mode = "otg";
+ status = "disabled";
+ };
+
+ usb2_1: usb@c0980000 {
+ compatible = "spacemit,k1-usb2";
+ reg = <0x0 0xc0980000 0x0 0x4100>;
+ interrupts = <118>;
+ clocks = <&syscon_apmu CLK_USB_P1>;
+ resets = <&syscon_apmu RESET_USBP1_AXI>;
+ phys = <&usbphy1>;
+ phy-names = "usb-phy";
+ dr_mode = "host";
+ status = "disabled";
+ };
+
usb_dwc3: usb@c0a00000 {
compatible = "spacemit,k1-dwc3";
reg = <0x0 0xc0a00000 0x0 0x10000>;

--
2.34.1