[PATCH 5/9] arm64: dts: qcom: ipq5332: Flatten usb controller node
From: George Moussalem via B4 Relay
Date: Tue Aug 25 2026 - 06:45:41 EST
From: George Moussalem <george.moussalem@xxxxxxxxxxx>
Flatten usb controller node and update to using latest bindings and
flattened driver approach.
Add property to select UTMI as reference clock for the DWC3 core to
calculate the right values for the period and frame length adjustment.
In addition, set the right UTMI clock rate and override any clock rate
inherited from the bootloader.
Signed-off-by: George Moussalem <george.moussalem@xxxxxxxxxxx>
Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts | 6 +--
arch/arm64/boot/dts/qcom/ipq5332.dtsi | 58 ++++++++++++++---------------
2 files changed, 29 insertions(+), 35 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts b/arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts
index c224ffc65b08..25a70cd884c0 100644
--- a/arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts
+++ b/arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts
@@ -90,11 +90,9 @@ spi_0_cs_pins: spi-0-cs-state {
};
&usb {
- status = "okay";
-};
-
-&usb_dwc {
dr_mode = "host";
+
+ status = "okay";
};
&usbphy0 {
diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
index 74d9de8d7641..87579a6b0e30 100644
--- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
@@ -493,16 +493,9 @@ qpic_nand: spi@79b0000 {
status = "disabled";
};
- usb: usb@8af8800 {
- compatible = "qcom,ipq5332-dwc3", "qcom,dwc3";
- reg = <0x08af8800 0x400>;
-
- interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "pwr_event",
- "dp_hs_phy_irq",
- "dm_hs_phy_irq";
+ usb: usb@8a00000 {
+ compatible = "qcom,ipq5332-dwc3", "qcom,snps-dwc3";
+ reg = <0x08a00000 0xfc100>;
clocks = <&gcc GCC_USB0_MASTER_CLK>,
<&gcc GCC_USB0_SLEEP_CLK>,
@@ -510,34 +503,37 @@ usb: usb@8af8800 {
clock-names = "core",
"sleep",
"mock_utmi";
+ assigned-clocks = <&gcc GCC_USB0_MOCK_UTMI_CLK>;
+ assigned-clock-rates = <60000000>;
- resets = <&gcc GCC_USB_BCR>;
-
- qcom,select-utmi-as-pipe-clk;
+ interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "dwc_usb3",
+ "pwr_event",
+ "dp_hs_phy_irq",
+ "dm_hs_phy_irq";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
interconnects = <&gcc MASTER_SNOC_USB &gcc SLAVE_SNOC_USB>,
<&gcc MASTER_SNOC_USB &gcc SLAVE_SNOC_USB>;
interconnect-names = "usb-ddr", "apps-usb";
- status = "disabled";
+ resets = <&gcc GCC_USB_BCR>;
- usb_dwc: usb@8a00000 {
- compatible = "snps,dwc3";
- reg = <0x08a00000 0xe000>;
- clocks = <&gcc GCC_USB0_MOCK_UTMI_CLK>;
- clock-names = "ref";
- interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
- phy-names = "usb2-phy";
- phys = <&usbphy0>;
- tx-fifo-resize;
- snps,is-utmi-l1-suspend;
- snps,hird-threshold = /bits/ 8 <0x0>;
- snps,dis_u2_susphy_quirk;
- snps,dis_u3_susphy_quirk;
- };
+ phys = <&usbphy0>;
+ phy-names = "usb2-phy";
+
+ qcom,select-utmi-as-pipe-clk;
+ qcom,select-utmi-as-ref-clk;
+
+ tx-fifo-resize;
+ snps,is-utmi-l1-suspend;
+ snps,hird-threshold = /bits/ 8 <0x0>;
+ snps,dis_u2_susphy_quirk;
+ snps,dis_u3_susphy_quirk;
+
+ status = "disabled";
};
intc: interrupt-controller@b000000 {
--
2.53.0