[PATCH 4/9] arm64: dts: qcom: ipq5018: Flatten usb controller node
From: George Moussalem via B4 Relay
Date: Tue Aug 25 2026 - 06:49:59 EST
From: George Moussalem <george.moussalem@xxxxxxxxxxx>
Flatten usb controller node and update to using latest bindings and
flattened driver approach.
Add property to select UTMI as reference clock for the DWC3 core to
calculate the right values for the period and frame length adjustment.
In addition, set the right UTMI clock rate and override any clock
rate inherited from the bootloader.
Signed-off-by: George Moussalem <george.moussalem@xxxxxxxxxxx>
Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts | 6 +--
arch/arm64/boot/dts/qcom/ipq5018.dtsi | 52 ++++++++++++--------------
2 files changed, 26 insertions(+), 32 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts b/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts
index 33eef92b19b1..8efb2b21ed9e 100644
--- a/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts
+++ b/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts
@@ -110,11 +110,9 @@ data-pins {
};
&usb {
- status = "okay";
-};
-
-&usb_dwc {
dr_mode = "host";
+
+ status = "okay";
};
&usbphy0 {
diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
index 4fc627b47fe7..71834606535e 100644
--- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
@@ -580,16 +580,9 @@ qpic_nand: spi@79b0000 {
status = "disabled";
};
- usb: usb@8af8800 {
- compatible = "qcom,ipq5018-dwc3", "qcom,dwc3";
- reg = <0x08af8800 0x400>;
-
- interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "pwr_event",
- "dp_hs_phy_irq",
- "dm_hs_phy_irq";
+ usb: usb@8a00000 {
+ compatible = "qcom,ipq5018-dwc3", "qcom,snps-dwc3";
+ reg = <0x08a00000 0xfc100>;
clocks = <&gcc GCC_USB0_MASTER_CLK>,
<&gcc GCC_SYS_NOC_USB0_AXI_CLK>,
@@ -599,30 +592,33 @@ usb: usb@8af8800 {
"iface",
"sleep",
"mock_utmi";
+ assigned-clocks = <&gcc GCC_USB0_MOCK_UTMI_CLK>;
+ assigned-clock-rates = <60000000>;
+
+ interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "dwc_usb3",
+ "pwr_event",
+ "dp_hs_phy_irq",
+ "dm_hs_phy_irq";
resets = <&gcc GCC_USB0_BCR>;
+ phys = <&usbphy0>;
+ phy-names = "usb2-phy";
+
qcom,select-utmi-as-pipe-clk;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
+ qcom,select-utmi-as-ref-clk;
- status = "disabled";
+ tx-fifo-resize;
+ snps,is-utmi-l1-suspend;
+ snps,hird-threshold = /bits/ 8 <0x0>;
+ snps,dis_u2_susphy_quirk;
+ snps,dis_u3_susphy_quirk;
- usb_dwc: usb@8a00000 {
- compatible = "snps,dwc3";
- reg = <0x08a00000 0xe000>;
- clocks = <&gcc GCC_USB0_MOCK_UTMI_CLK>;
- clock-names = "ref";
- interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
- phy-names = "usb2-phy";
- phys = <&usbphy0>;
- tx-fifo-resize;
- snps,is-utmi-l1-suspend;
- snps,hird-threshold = /bits/ 8 <0x0>;
- snps,dis_u2_susphy_quirk;
- snps,dis_u3_susphy_quirk;
- };
+ status = "disabled";
};
intc: interrupt-controller@b000000 {
--
2.53.0