[PATCH] PCI: tegra: Unwind partial PHY power-on failures
From: Pengpeng Hou
Date: Fri Aug 28 2026 - 05:24:15 EST
The Tegra PCIe PHY setup has two nested acquisition loops. Failure in a
per-port loop leaves earlier PHYs in that port powered, while failure in
the outer loop leaves all earlier ports powered.
Unwind the successfully powered PHYs in reverse order at both levels
before returning the original error.
The issue was identified via static analysis and manually reviewed.
Fixes: 6fe7c187e026 ("PCI: tegra: Support per-lane PHYs")
Assisted-by: LLM
Signed-off-by: Pengpeng Hou <pengpeng@xxxxxxxxxxx>
---
drivers/pci/controller/pci-tegra.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/pci/controller/pci-tegra.c b/drivers/pci/controller/pci-tegra.c
index 59b56446c507..443fa33b7f0e 100644
--- a/drivers/pci/controller/pci-tegra.c
+++ b/drivers/pci/controller/pci-tegra.c
@@ -1002,6 +1002,8 @@ static int tegra_pcie_port_phy_power_on(struct tegra_pcie_port *port)
err = phy_power_on(port->phys[i]);
if (err < 0) {
dev_err(dev, "failed to power on PHY#%u: %d\n", i, err);
+ while (i--)
+ phy_power_off(port->phys[i]);
return err;
}
}
@@ -1051,6 +1053,8 @@ static int tegra_pcie_phy_power_on(struct tegra_pcie *pcie)
dev_err(dev,
"failed to power on PCIe port %u PHY: %d\n",
port->index, err);
+ list_for_each_entry_continue_reverse(port, &pcie->ports, list)
+ tegra_pcie_port_phy_power_off(port);
return err;
}
}
--
2.43.0