Re: [PATCH] PCI: tegra: Unwind partial PHY power-on failures

[Thierry Reding]

On Fri, Aug 28, 2026 at 05:17:47PM +0800, Pengpeng Hou wrote:
> The Tegra PCIe PHY setup has two nested acquisition loops.  Failure in a
> per-port loop leaves earlier PHYs in that port powered, while failure in
> the outer loop leaves all earlier ports powered.
> 
> Unwind the successfully powered PHYs in reverse order at both levels
> before returning the original error.
> 
> The issue was identified via static analysis and manually reviewed.
> 
> Fixes: 6fe7c187e026 ("PCI: tegra: Support per-lane PHYs")
> 
> Assisted-by: LLM
> Signed-off-by: Pengpeng Hou <pengpeng@xxxxxxxxxxx>
> ---
>  drivers/pci/controller/pci-tegra.c | 4 ++++
>  1 file changed, 4 insertions(+)

We technically could do something like this, but honestly I don't see
the point. If this ever happened, it'd mean that either the system is
improperly designed, badly configured in device tree or somehow broken.
In either case the unwind isn't really going to save you.

Thierry

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