Re: [RFC PATCH] fpga: region: Add support for FPGA region variants

[Marco Pagani]

On 18/09/2026 19:36, Xu Yilun wrote:
> On Fri, Sep 18, 2026 at 05:07:07PM +0200, Marco Pagani wrote:
>>
>> Hi Yilun,
>>
>> Is it okay with you if I CC the DT people to ask for an opinion?
> 
> Of course. It's good to know in which case could a DTO be applied.
> 
> But to be clear, I think that only affects how we accept and apply the
> image-DTO pair. For now, I basically don't want a varient selection
> interface.


Hello Rob, Saravana, Krzysztof, Conor,

I'm CC-ing you on this thread as OF/DT maintainers to kindly ask
for your input on this debate we are having about how to implement
userspace FPGA reconfiguration, an important feature currently
lacking in mainline kernel.

https://lore.kernel.org/all/20260608164247.1998417-1-marco.pagani@xxxxxxxxx

To recap: modern FPGAs allow portions of the fabric to be reconfigured
at runtime to dynamically swap soft IPs. Usually, these IPs are
connected through a non-discoverable on-chip bus like AMBA AXI.
>From a kernel perspective, this means the FPGA device configuration
image (bitstream) must be paired with a DT fragment that describes
the new topology.

In this thread, we are essentially debating between two approaches for
implementing FPGA userspace reconfiguration at runtime:

- Statically defined Variants (this RFC): Userspace can change FPGA
  configuration by selecting from a pre-validated set of variants
  (DT fragments) baked into the base DT.

- Runtime DTOs (Nava's RFC): Userspace can change FPGA configuration
  by loading DTOs that are validated at runtime.

Could you share your thoughts on this? In your opinion, which one of
these two approaches aligns better with the DT infrastructure and
general kernel design philosophy?


Thanks,
Marco