Re: [PATCH v8 2/5] riscv_cbqri: resctrl: Add cache allocation via capacity block mask
From: Drew Fustini
Date: Thu Sep 24 2026 - 20:31:46 EST
On Wed, Sep 23, 2026 at 05:13:15PM +0800, yunhui cui wrote:
> Hi Fustini,
>
> On Fri, Sep 18, 2026 at 12:41 AM Drew Fustini <fustini@xxxxxxxxxx> wrote:
> >
> > Wire CBQRI capacity controllers into resctrl as RDT_RESOURCE_L2 and
> > RDT_RESOURCE_L3 schemata.
> >
> > resctrl exposes a single capacity mask per resource, so when more than
> > one capacity controller backs a cache level they must report the same
> > number of capacity blocks. The same holds for the other capabilities
> > resctrl exposes once per resource. A level whose controllers disagree
> > is left unexposed. Other levels are unaffected.
> >
> > Control domains are created in the cpuhp online callback and keyed on
> > the onlining CPU's cache id from cacheinfo, so a CPU that is offline at
> > probe time still joins its domain once it comes online. A domain is
> > published on the ctrl_domains RCU list only after it is fully
> > initialized and brought online, and removed from the list before it is
> > taken offline, following the documented safe traversal rules.
> >
> > Assisted-by: LLM
> > Tested-by: Chen Pei <cp0613@xxxxxxxxxxxxxxxxx>
> > Co-developed-by: Adrien Ricciardi <aricciardi@xxxxxxxxxxxx>
> > Signed-off-by: Adrien Ricciardi <aricciardi@xxxxxxxxxxxx>
> > Signed-off-by: Drew Fustini <fustini@xxxxxxxxxx>
> > ---
> > MAINTAINERS | 2 +
> > arch/riscv/include/asm/resctrl.h | 147 ++++++++
> > drivers/resctrl/Kconfig | 4 +
> > drivers/resctrl/Makefile | 1 +
> > drivers/resctrl/cbqri_resctrl.c | 785 +++++++++++++++++++++++++++++++++++++++
> > 5 files changed, 939 insertions(+)
[..]
> > diff --git a/drivers/resctrl/cbqri_resctrl.c b/drivers/resctrl/cbqri_resctrl.c
[..]
> > +/*
> > + * Note about terminology between x86 (Intel RDT/AMD QoS) and RISC-V:
> > + * CLOSID on x86 is RCID on RISC-V
> > + * RMID on x86 is MCID on RISC-V
> > + */
> > +u32 resctrl_arch_get_num_closid(struct rdt_resource *res)
> > +{
> > + struct cbqri_resctrl_res *hw_res;
> > +
> > + hw_res = container_of(res, struct cbqri_resctrl_res, resctrl_res);
> > +
> > + if (!hw_res->ctrl)
> > + return 0;
> > +
> > + return hw_res->ctrl->rcid_count;
> > +}
>
> When CDP is enabled, the resctrl core halves the value returned by
> resctrl_arch_get_num_closid(). Is that correct for CBQRI?
> CBQRI v1.0 defines allocation using an (RCID, AT) pair, and its example
> uses the same RCID=5 for separate AT=0 and AT=1 allocations.
>
> Thanks,
> Yunhui
You're right that this is not needed for RISC-V. CDP is still functional
but the upper half of RCIDs is unused.
It would require an fs/resctrl change to make the halving conditional.
Therefore, I would like to deal with that in a separate series and not
expand the scope of this series. I will add a comment above
resctrl_arch_get_num_closid() for v9, so the current situation is
obvious.
Thanks,
Drew