Re: [PATCH v3 2/2] EDAC/amd64: Set zn_regs_v2 for all Family 1Ah models
From: Borislav Petkov
Date: Fri Oct 02 2026 - 21:23:17 EST
On Fri, Oct 02, 2026 at 05:02:04PM +0530, Vishal Badole wrote:
> All Family 1Ah models use the v2 register layout. Today zn_regs_v2 is
> set in each model case. This works, but a new model could forget to set
> it and read the UMC registers at the wrong offsets.
>
> Set zn_regs_v2 once at the Family 1Ah level so it applies to all models
> uniformly, and drop the per-model assignments.
>
> No functional change intended.
>
> Suggested-by: Yazen Ghannam <yazen.ghannam@xxxxxxx>
> Signed-off-by: Vishal Badole <Vishal.Badole@xxxxxxx>
> Reviewed-by: Yazen Ghannam <yazen.ghannam@xxxxxxx>
> ---
> drivers/edac/amd64_edac.c | 8 ++------
> 1 file changed, 2 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
> index 0c0d11c72925..708fc1b4a999 100644
> --- a/drivers/edac/amd64_edac.c
> +++ b/drivers/edac/amd64_edac.c
> @@ -3887,23 +3887,19 @@ static int per_family_init(struct amd64_pvt *pvt)
> break;
>
> case 0x1A:
> + pvt->flags.zn_regs_v2 = 1;
> +
> switch (pvt->model) {
> case 0x00 ... 0x1f:
> pvt->max_mcs = 12;
> - pvt->flags.zn_regs_v2 = 1;
> - break;
> - case 0x40 ... 0x4f:
^^^^^^^^^^^^^^^^^^^
Why?
> - pvt->flags.zn_regs_v2 = 1;
> break;
> case 0x50 ... 0x57:
> case 0xc0 ... 0xc7:
> pvt->max_mcs = 16;
> - pvt->flags.zn_regs_v2 = 1;
> break;
> case 0x90 ... 0x9f:
> case 0xa0 ... 0xaf:
> pvt->max_mcs = 8;
> - pvt->flags.zn_regs_v2 = 1;
> break;
> }
> break;
> --
> 2.34.1
>
>
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette