Re: [PATCH v5 1/3] dt-bindings: edac: cdns,ddr-edac: add Cadence DDR EDAC

[Borislav Petkov]

On Mon, Oct 05, 2026 at 02:49:22PM +0200, Paul Louvel wrote:
> Add the Cadence EDAC dt binding.
> The memory controller optionally supports ECC SECDED with DDR2/DDR3
> memory.
> 
> Reviewed-by: Wolfram Sang <wsa+renesas@xxxxxxxxxxxxxxxxxxxx>
> Signed-off-by: Paul Louvel (Schneider Electric) <paul.louvel@xxxxxxxxxxx>
> ---
>  .../devicetree/bindings/edac/cdns,ddr-edac.yaml    | 61 ++++++++++++++++++++++
>  MAINTAINERS                                        |  6 +++
>  2 files changed, 67 insertions(+)

Needs review by DT maintainers if it is going to go through the EDAC tree, see
output of:

./scripts/get_maintainer.pl -f Documentation/devicetree/bindings/edac/

-- 
Regards/Gruss,
    Boris.

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