Re: [PATCH 1/2] PCI: Don't treat ~0 as ready in pci_dev_wait() with RRS SV

[Alexander Gruhlke]

On Sat, Oct 10, 2026 at 08:36:38PM +0200, Lukas Wunner wrote:
> The code comment should be rephrased such that "returns" is replaced
> with "may return" because of the optionality of RRS Completions.

Will do in v2.

> I think it's sufficient if you just change the if-condition like this:
>
> -			if (!pci_bus_rrs_vendor_id(id))
> +			if (!pci_bus_rrs_vendor_id(id) &&
> +			    !PCI_POSSIBLE_ERROR(id)) {
>
> I don't see the need for the extra read of the Command register
> you're performing.

The Vendor ID of a VF always reads ~0, so with that condition, an FLR
of a VF below a Root Port with RRS SV would poll until the 60 s timeout
and fail.  That's why the branch without RRS SV reads the Command
register, too (see the comment above the loop).  I'll mention it in the
commit message.

Thanks,
Alexander