Re: [PATCH 1/2] PCI: Don't treat ~0 as ready in pci_dev_wait() with RRS SV
From: Lukas Wunner
Date: Sun Oct 11 2026 - 12:09:48 EST
On Sun, Oct 11, 2026 at 10:24:08AM +0200, Alexander Gruhlke wrote:
> On Sat, Oct 10, 2026 at 08:36:38PM +0200, Lukas Wunner wrote:
> > I think it's sufficient if you just change the if-condition like this:
> >
> > - if (!pci_bus_rrs_vendor_id(id))
> > + if (!pci_bus_rrs_vendor_id(id) &&
> > + !PCI_POSSIBLE_ERROR(id)) {
> >
> > I don't see the need for the extra read of the Command register
> > you're performing.
>
> The Vendor ID of a VF always reads ~0, so with that condition, an FLR
> of a VF below a Root Port with RRS SV would poll until the 60 s timeout
> and fail. That's why the branch without RRS SV reads the Command
> register, too (see the comment above the loop). I'll mention it in the
> commit message.
Ah okay, thanks for the clarification. So how about:
- if (!pci_bus_rrs_vendor_id(id))
+ if (!pci_bus_rrs_vendor_id(id) &&
+ (!PCI_POSSIBLE_ERROR(id) || dev->is_virtfn))
Per PCIe r7.1 sec 9.4.3.3.1, VFs may respond with RRS Completions
under certain circumstance, so the Vendor ID does not *always* read
as 0xffff, despite sec 7.5.1.1.1 saying so. The above should handle
that correctly (unless I've botched it again).
Thanks,
Lukas