Re: [PATCH v4 5/5] phy: qcom-qmp-ufs: Add Glymur support
From: Manivannan Sadhasivam
Date: Fri Oct 16 2026 - 05:53:04 EST
On 2026-10-09 16:05 +0530, Pradeep P V K wrote:
> Add the init sequence tables and config for the UFS QMP phy found in
> the Glymur SoC.
>
> Similar to SM8750, the QSERDES RX and TX register offsets for
> glymur SoC follow the v7 register layout, while the remaining
> (PCS, MPHY base) register offsets follow v6 layout. Update the
> register layouts accordingly.
>
> Reviewed-by: Abel Vesa <abel.vesa@xxxxxxxxxxxxxxxx>
> Acked-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxxxxxxxx>
> Signed-off-by: Pradeep P V K <pradeep.pragallapati@xxxxxxxxxxxxxxxx>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxxxxxxxx>
- Mani