Re: [PATCH 3/3] drm/msm/a8xx: Enable CLX feature on Adreno X2-85
From: Abel Vesa
Date: Mon Oct 19 2026 - 16:32:37 EST
On 26-05-16 01:37:51, Akhil P Oommen wrote:
> Add the CLX domain table and the IFF/PCLX limits tables to the catalog to
> enable CLX feature support on Adreno X2-85 GPU present in the Glymur
> chipset.
Same on Glymur CRD with next-20261013, GMU fw v5.2.38:
[ 6.619232] platform 3d6c000.gmu: [drm:a6xx_hfi_wait_for_msg_interrupt [msm]] *ERROR* Message HFI_H2F_MSG_GX_BW_PERF_VOTE id 11 timed out waiting for response
[ 6.629590] platform 3d6c000.gmu: [drm:a6xx_gmu_set_oob [msm]] *ERROR* Timeout waiting for GMU OOB set GPU_SET: 0x4
[ 6.629750] msm_dpu ae01000.display-controller: [drm:adreno_load_gpu [msm]] *ERROR* gpu hw init failed: -110
[ 14.795082] platform 3d6c000.gmu: [drm:a6xx_gmu_resume [msm]] *ERROR* GMU firmware initialization timed out
Dropping just the .clx_tbl/.limits_tbl from the 0x44070001 entry fixes it.
Tried on top of next-20261013, no change:
- the QCOM_SCM_GPU_CLX_EN_REQ change
- GENPD_FLAG_NO_STAY_ON on gpu_cc_cx_gdsc
- modprobe.blacklist=msm and modprobe msm at ~90s, after all sync_state()
calls are done
So on CRD it is not an ordering issue. The CLX/IFF_PCLX HFI messages are
all acked, then the first GX_BW_PERF_VOTE never gets a reply and the GMU
stays wedged after that.