Re: [PATCH 3/3] drm/msm/a8xx: Enable CLX feature on Adreno X2-85

[Oleg Keri]

Sent: https://lore.kernel.org/r/20261021080517.2161-1-okerixx@xxxxxxxxx

Narrowed it down meanwhile, with the clamp corner selectable on the
command line: gmxc pinned at max is harmless. gfx pinned at level 11
(0x1c4, the top of the perf table), 12 or 13 fails every time, level 10
and below boots fine. So it isn't "the rail can't follow", it's the gfx
rail sitting at or above the highest level in the table while the
firmware calibrates. CLX being a current limiter, a limit entry would be
my guess, but that's firmware territory.

If the CRD still fails after sync_state, gfx.lvl being held at the top
level by something else would be the first thing I'd check there.

Oleg