Re: [PATCH v3] x86/mce: Do not treat cache hierarchy errors as memory errors

[Sohil Mehta]

On 10/19/2026 11:34 AM, Adrian Schlegel wrote:
> On Mon Oct 19, 2026 at 5:32 PM CEST, Yazen Ghannam wrote:
>> The SDM also mentions "Extended Memory Errors". I guess these were left
>> out before, but should they be included?
> 
> I don't think so, since from what I can tell from the Intel SDM (Memory
> Controller and Extended Memory Errors), extended memory errors use the
> same encoding as normal memory errors, but report errors in memory that
> is used as a cache, similar to what cache hierarchy errors do.
> 

Yeah, the mismatch between the code and SDM has been a little confusing.
It might be worth adding a code comment or a changelog note about why
Extended Memory errors are not part of the check.


> I also found this thread, where Tony made the same point:
> https://lore.kernel.org/all/SJ1PR11MB60831E048B544C83E845D907FC8DA@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/
> 

Adrian just added me to this thread..

But, the TDX issue that Sashiko reported seems valid to me. It may only
affect early TDX platforms. So, adding some TDX folks in case they care
about this change.

https://sashiko.dev/#/patchset/20261012193305.38931-1-me%40adrianschlegel.com

Looking at the comment on top of tdx_dump_mce_info() and commit
70060463cb2b ("x86/mce: Differentiate real hardware #MCs from TDX
erratum ones") could poison consumption be reported with a cache
hierarchy code?

IIUC (based on the MCACOD_DATA example in the commit), the TDX error
line will no longer be printed after this patch:

CPU 147: Machine Check Exception: f Bank 1: bd80000000100134
Machine check: Data load in unrecoverable area of kernel
Machine Check: TDX private memory error. Possible kernel bug.