On Wed, 5 Apr 2000, clubneon wrote:
> Wasn't there a problem with Intel's newest chipset and ECC DIMMs?
That's what I read. I also read that it didn't make any difference
because "nobody's using ECC on PCs anyway....". I questioned
one of our design Engineers here and he confirmed that so-called
ECC Ram is "vaporware", marketing hype. I'm told that the little
chip on the RAMs, proported to be ECC stuff is just a PAL, with
some selected-per-production-run, timing compensation so that
errors are supposed to be, well, "impossible"????
>
> On Wed, 5 Apr 2000, Mark Hahn wrote:
>
> > On Wed, 5 Apr 2000, Richard B. Johnson wrote:
> >
> > > None of the PC stuff ever corrected RAM errors with a CRC, even though
> >
> > nonsense. the BX chipset, for instance, most definitely supports SECDED;
> > see section 3.3.28 in the datasheet. I believe the LX did as well,
> > and the HX back in the P5 era. RDRAM seems to be _only_ available in ECC.
> >
> > > ECC RAM just accumulated bits from multiple columns to save parity
> > > bits. It still hit MNI when it detected an error. Alpha and Suns
> >
> > BX is normally configured (if ECCing) to report only uncorrected errors.
> > there's a chipset register to report the problem address, and you can
> > tell it to report even corrected, single-bit errors. AFAIK none of this
> > is touched by Linux.
>
>
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Cheers,
Dick Johnson
Penguin : Linux version 2.3.41 on an i686 machine (800.63 BogoMips).
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