This is up with some updates
Short notice development for Promise Ultra100 TX2 sponsored by
Penguin Computer and again little/no help from Promise.
This is a unique chipset that does setfeatures sensing of the transfer
rates and thus it is counter to the standard Promise design. It does
still use the pdc202xx.c chipset code, but much of it is skipped over to
preserve the hidden settings calls. The one issue for this chipset is
that it may not be ideal for hotswap as the unknown states are issues.
DiskPerf /dev/hde
Device: IBM-DTLA-307075 Serial Number: YSDYSFA5874
LBA 0 DMA Read Test = 63.35 MB/Sec (3.95 Seconds)
Outer Diameter Sequential DMA Read Test = 35.89 MB/Sec (6.97 Seconds)
Inner Diameter Sequential DMA Read Test = 17.64 MB/Sec (14.17 Seconds)
CR3's adjusted: for kernel transfer rates and conservative
LBA 0 DMA Read Test = 85.52 MB/Sec
Outer Diameter Sequential DMA Read Test = 48.45 MB/Sec
Inner Diameter Sequential DMA Read Test = 23.81 MB/Sec
There is about a 35%-40% under reporting of performance from kernel to
user-space ioctl calls.
Cheers,
Andre Hedrick
Linux ATA Development
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This archive was generated by hypermail 2b29 : Sun Apr 15 2001 - 21:00:12 EST