On Thu, 8 Aug 2002, Roland Kuhn wrote:
> On Wed, 7 Aug 2002, David S. Miller wrote:
>
> > From: Roland Kuhn <rkuhn@e18.physik.tu-muenchen.de>
> > Date: Thu, 8 Aug 2002 00:10:31 +0200 (CEST)
> >
> > Since the insertion of a dummy write solved the problem, I would say it's
> > the chipset's PCI reordering, which is malfunctioning in the 2466.
> >
> > Roland can you retry using this patch? The difference from
> > my previous one is that when we use the indirect register
> > writing of the mailbox registers, we offset into the GRCMBOX
> > area of the chip registers.
> >
> > This seems to be how Broadcom's driver does indirect accesses
> > to mailbox registers.
> >
> Will try in a minute. Do I understand it correctly, that only the mailbox
> writes must be done this way? And how do the pci_write_config_dword()
> functions ensure the right ordering? (Sorry, it was late yesterday and I
> somehow didn't find the definition of pci_*_config_*().)
>
Sorry, this was a long minute, however after applying your patch to
vanilla 2.4.19 (tg3 v0.99) by hand (the TG3_FLAG_WOL_SPEED_100MB already
is 0x800 there, and no adjacent bits are free), the kernel simply freezes
when I do "/etc/init.d/network start". The insmod is okay, the messages
look like always, but I could not get any more info on the freeze because
nothing gets written to disk, no output on the screen, no sysrq, ...
If I can do more to help sort this out, please tell me. With my fix to
prefix every write with a dummy read, the system is rock solid, not a
single glitch on 12 machines in the last 14 hours.
I'm very curious on how this all works, so would somebody please give me a
pointer where to start reading concerning linux and PCI
reordering/pci_write_config_dword?
Ciao,
Roland
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This archive was generated by hypermail 2b29 : Thu Aug 15 2002 - 22:00:16 EST