From: Roland Kuhn <rkuhn@e18.physik.tu-muenchen.de>
Date: Thu, 8 Aug 2002 14:39:56 +0200 (CEST)
If I can do more to help sort this out, please tell me. With my fix to
prefix every write with a dummy read, the system is rock solid, not a
single glitch on 12 machines in the last 14 hours.
I'll figure out why this indirect register stuff isn't working.
I'm very curious on how this all works, so would somebody please give me a
pointer where to start reading concerning linux and PCI
reordering/pci_write_config_dword?
The PCI controller might be illegally reordering PCI MEM space
accesses to the card's registers with asynchronous DMA activity.
If that is true, the explanation is that the PCI config space
accesses synchrnoize wrt. pending DMA operations the device is
doing.
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This archive was generated by hypermail 2b29 : Thu Aug 15 2002 - 22:00:16 EST