On Tue, 13 Aug 2002, Martin J. Bligh wrote:
>
> Was there some reason you really need this on P4s? I seem to recall something
> to do with timer interrupts, but don't remember exactly.
Without the explicit balancing, _every_single_ external interrupt comes in
on CPU0 on a P4.
The P4 local APIC doesn't do irq scheduling in hardware (never mind that
Intel documented it as architecture behaviour in earlier local APICs)
Linus
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This archive was generated by hypermail 2b29 : Thu Aug 15 2002 - 22:00:32 EST