Re: L1_CACHE_SHIFT value for P4 ?

From: Mikael Pettersson (mikpe@csd.uu.se)
Date: Thu Nov 21 2002 - 10:03:39 EST


Dave Jones writes:
> On Thu, Nov 21, 2002 at 02:10:02PM +0100, Andi Kleen wrote:
>
> > The P4 has 128byte L2 cache lines (2^7). The L1 apparently has smaller lines.
>
> Not mine:
>
> L2 unified cache:
> Size: 512KB Sectored, 8-way associative.
> line size=64 bytes.
>
> Someone (Manfred?) pointed out a chapter in the P4 system programmer guide about
> this last time I brought it up. I forget the reasoning, I'll see if I can dig it out..

The info is in the P4 Code Optimization manual. I don't have it handy,
but as I recall, the P4s have 64 byte sectors and read two sectors on
a read miss. I don't know what happens on writes.

/Mikael
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