Re: [PATCH] Support worst case cache line sizes as config option

From: Andi Kleen (ak@muc.de)
Date: Mon Apr 28 2003 - 06:47:17 EST


On Mon, Apr 28, 2003 at 11:16:16AM +0200, Adrian Bunk wrote:
> Your X86_GENERIC is semantically equivalent to M386.

M386 is tuning for the Intel 386

X86_GENERIC is "try to tune for all CPUs if possible"

> This doesn't work. E.g. MPENTIUMIII has the semantics of "support
> Pentium-III and above". If you want to compile a kernel that runs on
> both a Pentium-III and a Pentium-4 you choose MPENTIUMIII which implies
> X86_L1_CACHE_SHIFT=5 ...

Admittedly the other options could be changed to

default "4" if (MELAN || M486 || M386) && !X86_GENERIC

but that looked a bit too ugly and it seems to work even without.

-Andi
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