Re: [PATCH] Support worst case cache line sizes as config option

From: Adrian Bunk (bunk@fs.tum.de)
Date: Mon Apr 28 2003 - 07:19:20 EST

On Mon, Apr 28, 2003 at 01:47:17PM +0200, Andi Kleen wrote:
> On Mon, Apr 28, 2003 at 11:16:16AM +0200, Adrian Bunk wrote:
> > Your X86_GENERIC is semantically equivalent to M386.
>
> M386 is tuning for the Intel 386
>
> X86_GENERIC is "try to tune for all CPUs if possible"

M386 says that the minimum CPU supported is the 386 - and all CPUs
above are supported, too. E.g.:

config X86_PPRO_FENCE
        bool
        depends on M686 || M586MMX || M586TSC || M586 || M486 || M386
        default y

config X86_F00F_BUG
        bool
        depends on M586MMX || M586TSC || M586 || M486 || M386
        default y

> > This doesn't work. E.g. MPENTIUMIII has the semantics of "support
> > Pentium-III and above". If you want to compile a kernel that runs on
> > both a Pentium-III and a Pentium-4 you choose MPENTIUMIII which implies
> > X86_L1_CACHE_SHIFT=5 ...
>
> Admittedly the other options could be changed to
>
> default "4" if (MELAN || M486 || M386) && !X86_GENERIC
>
> but that looked a bit too ugly and it seems to work even without.

Your approach as well as the approach I'm currently working on breaks
the current semantics that a plain M386 produces a kernel that runs on
all CPUs.

> -Andi

cu
Adrian 

-- 

       "Is there not promise of rain?" Ling Tan asked suddenly out
        of the darkness. There had been need of rain for many days.
       "Only a promise," Lao Er said.
                                       Pearl S. Buck - Dragon Seed

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