Re: spurious 8259A interrupt

[Jamie Lokier]

Robert_Hentosh@xxxxxxxx wrote:
> >  IRQ10 asserted
> >  INTACK cycle lets PIC deliver vector to processor
> >  processor masks IRQ10 in PIC
> >  processor sends EOI command to PIC
> >  processor reads a status register in the NIC, which causes IRQ10 to be
> >  deasserted
> >  processor unmasks IRQ10 in PIC

> The PIC defaults to IRQ7 because of its design, when IRQ10 was already
> cleared. Sticking delays in is not viable in a generic ISR routing.  A
> possible fix to this issue would be to issue the EOI after the read to
> the status register on the NIC, and I see some documentation on the PIC
> that actually suggests that this is the way to service an interrupt.
> This seemed like a risky change, since sending the EOI and using the
> mask has been in use for some time and the change would effect all
> devices using interrupts.

That reminds me: why does Linux mask the IRQ anyway?

Why doesn't it simply call the handler functions, and then send EOI to
the PIC with no unmasking?

For those rare occasions when an interrupt handler wants to re-enable
interrupts (sti), _then_ it could mask the interrupt that called the handler.

Why wouldn't that work?

-- Jamie
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