Re: Page Fault Scalability patch V19 [1/4]: pte_cmpxchg andCONFIG_ATOMIC_TABLE_OPS

[Andi Kleen]

Christoph Lameter <clameter@xxxxxxx> writes:
>
> Atomic operations may be enabled in the kernel configuration on
> i386, ia64 and x86_64 if a suitable CPU is configured in SMP mode.
> Generic atomic definitions for ptep_xchg and ptep_cmpxchg
> have been provided based on the existing xchg() and cmpxchg() functions
> that already work atomically on many platforms. It is very

I'm curious - do you have any micro benchmarks on i386 or x86-64 systems
about the difference between spin_lock(ptl) access; spin_unlock(ptl);
and cmpxchg ? 

cmpxchg can be quite slow, with bad luck it could be slower than 
the spinlocks.

A P4 would be good to benchmark this because it seems to be the worst
case.

-Andi
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